SBOSAE5 December   2024 INA750B

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Shunt Resistor
      2. 6.3.2 Safe Operating Area
      3. 6.3.3 Short-Circuit Duration
      4. 6.3.4 Temperature Drift Correction
      5. 6.3.5 Enhanced PWM Rejection Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Adjusting the Output With the Reference Pin
        1. 6.4.1.1 Reference Pin Connections for Unidirectional Current Measurements
        2. 6.4.1.2 Ground Referenced Output
        3. 6.4.1.3 Reference Pin Connections for Bidirectional Current Measurements
        4. 6.4.1.4 Output Set to Mid-Supply Voltage
      2. 6.4.2 Adjustable Gain Set Using External Resistors
        1. 6.4.2.1 Adjustable Unity Gain
      3. 6.4.3 Thermal Alert Function
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Calculating Total Error
        1. 7.1.1.1 Error Sources
        2. 7.1.1.2 Reference Voltage Rejection Ratio Error
        3. 7.1.1.3 External Adjustable Gain Error
        4. 7.1.1.4 Total Error Example 1
        5. 7.1.1.5 Total Error Example 2
        6. 7.1.1.6 Total Error Example 3
        7. 7.1.1.7 Total Error Curves
    2. 7.2 Signal Filtering
    3. 7.3 Typical Application
      1. 7.3.1 High-Side, High-Drive, Solenoid Current-Sense Application
        1. 7.3.1.1 Design Requirements
        2. 7.3.1.2 Detailed Design Procedure
        3. 7.3.1.3 Application Curve
      2. 7.3.2 Speaker Enhancements and Diagnostics Using Current Sense Amplifier
        1. 7.3.2.1 Design Requirements
        2. 7.3.2.2 Detailed Design Procedure
        3. 7.3.2.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

at TA = 25 °C, VS = 5V, ISENSE = IS+ = 0A, VCM = VIN– = 48V, VFB = VOUT (Adjustable Gain = 1), and VREF = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VCM Common-mode input range VIN+ = –4V to 110V, ISENSE = 0A,
TA = –40°C to +125°C
–4 110 V
CMRR Common-mode rejection ratio VIN+ = –4V to 110V, ISENSE = 0A,
TA = –40°C to +125°C, INA750A
±12.5 ±40 µA/V
VIN+ = –4V to 110V, ISENSE = 0A,
TA = –40°C to +125°C, INA750B
±400 ±650
CMRR Common-mode rejection ratio f = 50kHz ±28 mA/V
Ios Input referred offset current error ISENSE = 0A, INA750A ±2.5 ±15 mA
ISENSE = 0A, INA750B ±32 ±125
dIos/dT Input referred offset current error drift ISENSE = 0A, 
TA = –40°C to +125°C, INA750A
±0.063 ±0.4 mA/°C
ISENSE = 0A, 
TA = –40°C to +125°C, INA750B
±0.125 ±0.65
PSRR Power supply rejection ratio VS = 2.7V to 5.5V, VREF = 1V,
ISENSE = 0A, INA750A
±0.125 ±2.5 mA/V
VS = 2.7V to 5.5V, VREF = 1V,
ISENSE = 0A, INA750B
±1.25 ±12.5
IB Total input bias current IB++ IB-, ISENSE = 0A 45 66 90 µA
IFB Feed-back current ISENSE = 0A ±2 nA
ISENSE = 0A, TA = –40°C to +125°C ±6
INTEGRATED SHUNT RESISTOR
RSHUNT Internal Kelvin shunt resistance IN+ to IN-, TA = 25 °C 0.8
Pin to pin package resistance IS+ to IS-, TA = 25 °C 0.800 960 1.200
Pin to pin package inductance IS+ to IS-, TA = 25 °C 2.5 nH
ISENSE Maximum Continuous Current TA = –40°C to +125°C ±25 A
Shunt short time overload ISENSE = 55A for 5 seconds ± 0.01 %
Shunt temperature cycle –65°C to 150°C, 500 cycles ± 0.05 %
Shunt resistance to solder heat 260°C solder, 10 seconds ± 0.1 %
Shunt high temperature exposure  1000 hours, TA = 150°C ± 0.015 %
OUTPUT
G Gain INA750A, INA750B  40 mV/A
G System Gain Error (shunt + amplifier) GND + 50mV ≤ VOUT  ≤ VS – 200mV,
TA = 25°C, ISENSE = ±25A, INA750A
±0.05 ±0.35 %
GND + 50mV ≤ VOUT  ≤ VS – 200mV,
TA = 25°C, ISENSE = ±5A, INA750A
±0.05 ±0.35
(1)GND + 50mV ≤ VOUT  ≤ VS – 200mV,
TA = 25°C, ISENSE = ±25A, INA750B
±0.3 ±1
GND + 50mV ≤ VOUT  ≤ VS – 200mV,
TA = 25°C, ISENSE = ±5A, INA750B
±0.1 ±0.625
G System Gain Error Drift (shunt + amplifier) TA = –40°C to +125°C, INA750A ±0.5 ±35 ppm/°C
TA = –40°C to +125°C, INA750B ±10 ±100
Power Coefficient Gain non-Linearity Error (2)GND + 10mV ≤ VOUT ≤ VS – 200mV 6 ppm/A2
RVRR Reference voltage rejection ratio (input - referred) VREF = 0.5V to 4.5V ±1.15 ±6.25 mA/V
Maximum Capacitive Load No sustained oscillation 0.5 nF
VOLTAGE OUTPUT
Swing to VS Power Supply Rail RL = 10kΩ to GND, VREF = VS ,
Adjustable Gain = 4,
TA = –40°C to +125°C
VS – 0.05 VS – 0.1 V
Swing to Ground RL = 10kΩ to GND, VREF = GND,
Adjustable Gain = 4,
TA = –40°C to +125°C
VGND + 5 VGND + 10 mV
Swing to Ground RL = 10kΩ to GND, VREF = GND,
TA = –40°C to +125°C
VGND + 1 VGND + 5 mV
FREQUENCY RESPONSE
BW Bandwidth (current sense amplifier only) -3dB Bandwidth, VFB = VOUT   1 MHz
-3dB Bandwidth, Adjustable Gain = 4   0.5 MHz
Propagation delay(3) VIN+, VIN- = 48V, Adjustable Gain = 1,
VREF = 150mV, Load Step = 0A to 20A,
Output settles to 1%
0.250 µs
Total Settling time (current in to out) VIN+, VIN- = 48V, Adjustable Gain = 1,
VREF = 150mV, Load Step = 0A to 20A,
Output settles to 1%
5 µs
SR Slew Rate VFB = VOUT 1.8 V/µs
Adjustable Gain = 4 1.5 V/µs
NOISE
Current Noise Density 75 µA/√Hz
POWER SUPPLY
IQ Quiescent current 3.5 4.25 mA
TA = –40°C to +125°C 4.5 mA
TEMPERATURE
TAlert Thermal Alert Threshold Rpull-up = 10kΩ,  160 °C
VLOAlert Thermal Alert Low-level output voltage Rpull-up = 10kΩ, 
200

mV
This is inclusive of Power Coefficient Gain Non-linearity Error
ISENSE = ± 5A to ± 25A, VOUT = VREF ± 1V
Propagation delay is difference of time between 10% of load step to 10% of final output settling value