SBOSA75B July   2021  – November 2021 INA823

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Gain-Setting Function
        1. 8.3.1.1 Gain Drift
      2. 8.3.2 Input Common-Mode Voltage Range
      3. 8.3.3 Input Protection
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Bias Current Return Path
    2. 9.2 Typical Applications
      1. 9.2.1 Resistive-Bridge Pressure Sensor
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Supporting High Common-Mode Voltage in PLC Input Modules
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 PSpice® for TI
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Gain-Setting Function

Figure 8-2 shows that the gain of the INA823 is set by a single external resistor (RG) connected between the RG pins (pins 1 and 8).

Figure 8-2 Simplified Schematic of the INA823 With Gain and Output Equations

The gain of the INA823 can be calculated with Equation 1:

Equation 1. G = 1+ 100 kΩ R G

The value of the external gain resistor RG is then derived from the gain equation:

Equation 2. R G  =  100 kΩ G  -  1 

Table 8-1 lists several commonly used gains and resistor values. The 100-kΩ term in Equation 1 is a result of the sum of the two internal 50-kΩ feedback resistors. These on-chip resistors are laser-trimmed to accurate absolute values. The accuracy and temperature coefficients of these resistors are included in the gain accuracy and drift specifications of the Section 7.5. As shown in Figure 8-2 and explained in more details in Section 11, make sure to connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground that are placed as close to the device as possible.

Table 8-1 Commonly Used Gains and Resistor Values
DESIRED GAIN NEAREST 1% RG (Ω) CALCULATED GAIN ERROR (%)
1 Not connected Not connected
2 100 k 0
5 24.9 k 0.321
10 11 k 0.909
20 5.23 k 0.602
33 3.09 k 1.098
50 2.05 k 0.439
65 1.58 k 1.091
100 1.02 k 0.961
200 499 0.700
500 200 0.200
1000 100 0.100