SBOS945B November   2020  – April 2021 INA849

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adjustable Gain Setting
      2. 8.3.2 Gain Drift
      3. 8.3.3 Wide Input Common-Mode Range
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reference Pin
      2. 9.1.2 Input Bias Current Return Path
      3. 9.1.3 Thermal Effects due to Power Dissipation
    2. 9.2 Typical Application
      1. 9.2.1 Sensor Conditioning Circuit
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Phantom Power in Microphone Preamplifier Circuit
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-379579F4-E8D7-410C-A725-D960D443C746-low.svg Figure 6-1 D Package (8-Pin SOIC) and DGK Package (8-Pin VSSOP), Top View
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
–IN 1 I Negative (inverting) input
+IN 4 I Positive (noninverting) input
OUT 7 O Output
RG 2, 3 — Gain setting pin. Place a gain resistor between pin 2 and pin 3.
REF 6 I Reference input. This pin must be driven by a low impedance source.
–VS 5 — Negative supply
+VS 8 — Positive supply