SBOS999A
March 2022 – October 2022
INA851
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Related Products
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Adjustable Gain Setting
8.3.1.1
Gain Drift
8.3.2
Offset Voltage
8.3.3
Input Common-Mode Range
8.3.4
Input Protection
8.3.5
Output Clamping
8.3.6
Low Noise
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Output Common-Mode Pin
9.1.2
Output-Stage Gain Selection and Noise-Gain Shaping
9.1.3
Input Bias Current Return Path
9.1.4
Thermal Effects due to Power Dissipation
9.2
Typical Applications
9.2.1
Three-Pin Programmable Logic Controller (PLC)
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
20-Bit, 1-MSPS ADS8900B Driver Circuit With FDA Noise Filter
9.2.2.1
Design Requirements
9.2.2.2
Application Curves
9.2.3
24-Bit, 200 kSPS, Delta-Sigma ADS127L11 ADC Driver Circuit With FDA Noise Filter
9.2.3.1
Design Requirements
9.2.3.2
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.1.1.1
PSpice® for TI
10.1.1.2
TINA-TI™ Simulation Software (Free Download)
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGT|16
MPQF119H
Thermal pad, mechanical data (Package|Pins)
RGT|16
QFND098S
Orderable Information
sbos999a_oa
sbos999a_pm
1
Features
Gain programmable from
G = 0.2 to 10,000 by using external resistor
Fully differential outputs with integrated clamping
Low offset voltage: 10 µV (typ), 35 µV (max)
Low offset drift: 0.1 µV/°C (typ), 0.3 µV/°C (max)
Low input bias current: 5 nA (typ)
Input stage noise: 3.2 nV/√
Hz
, 0.8 pA/√
Hz
Wide bandwidth: 22 MHz at G = 0.2,
15 MHz at G = 1
Common-mode rejection: 106 dB (min) at G = 10, 120 dB (min) at 100 ≤ G ≤ 1000
Power supply rejection: 110 dB (min) at G = 1
Supply current: 6 mA (typ)
Input overvoltage protection to ±40 V beyond supplies
Supply range:
Single supply: 8 V to 36 V
Dual supply: ±4 V to ±18 V
Specified temperature range: –40°C to +125°C
Tiny package: 16-pin VQFN