SLLS983L June   2009  – October 2023 ISO1050

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics - DC Specification
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Time-Out (DTO)
        2. 8.3.3.2 Thermal Shutdown
        3. 8.3.3.3 Undervoltage Lockout and Fail-Safe
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
    1. 10.1 General Recommendations
    2. 10.2 Power Supply Discharging
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

GUID-91CE0639-A3F7-4991-996A-465A7CFAFF8E-low.gif Figure 7-1 Driver Voltage, Current and Test Definitions
GUID-F52C697B-5F68-46B2-822B-BA490ED805A3-low.gif Figure 7-2 Bus Logic State Voltage Definitions
GUID-26272AD1-3B9B-48CB-AF50-E319577AB5B9-low.gif Figure 7-3 Driver VOD With Common-Mode Loading Test Circuit
GUID-88026840-C365-4C11-9F76-6EC8F8A02B8E-low.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes instrumentation and fixture capacitance within ±20%.
Figure 7-4 Driver Test Circuit and Voltage Waveforms
GUID-954AA04D-272A-4B4D-81A2-C2FF9080C0B8-low.gif Figure 7-5 Receiver Voltage and Current Definitions
GUID-25D2CC99-88F7-4423-96E9-8FCAC78985BE-low.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes instrumentation and fixture capacitance within ±20%.
Figure 7-6 Receiver Test Circuit and Voltage Waveforms
Table 7-1 Differential Input Voltage Threshold Test
INPUT OUTPUT
VCANH VCANL |VID| R
–11.1 V –12 V 900 mV L VOL
12 V 11.1 V 900 mV L
–6 V –12 V 6 V L
12 V 6 V 6 V L
–11.5 V –12 V 500 mV H VOH
12 V 11.5 V 500 mV H
–12 V –6 V –6 V H
6 V 12 V –6 V H
Open Open X H
GUID-314767EC-4854-4689-889E-C1A9700F5F3C-low.gif Figure 7-7 Transient Overvoltage Test Circuit
GUID-E6088FA5-52A0-4AA5-A1CE-F54AC4959E8D-low.gif Figure 7-8 Peak-to-Peak Output Voltage Test Circuit and Waveform
GUID-6E32F203-4692-4281-A096-9D1C3F1425D4-low.gif Figure 7-9 tLOOP Test Circuit and Voltage Waveforms
GUID-017E5BA7-68FF-4EED-89D8-B6924E628BD4-low.gif
A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes instrumentation and fixture capacitance within ±20%.
Figure 7-10 Dominant Time-out Test Circuit and Voltage Waveforms
GUID-269AA736-CDFC-473F-89F4-3CBC8CBF03A3-low.gif Figure 7-11 Driver Short-Circuit Current Test Circuit and Waveforms
GUID-8048ED5B-7725-46F5-BC7E-4647B934382B-low.gif Figure 7-12 Fail-Safe Delay Time Test Circuit and Voltage Waveforms
GUID-DF66066D-AA80-475F-854F-50FAF1E88DB1-low.gif Figure 7-13 Common-Mode Transient Immunity Test Circuit
GUID-BF895B1D-CD96-4AFD-AC7C-710EA17B4346-low.gif Figure 7-14 Electromagnetic Emissions Measurement Setup