SLLSE28H october   2010  – august 2023 ISO1176T

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: ISODE-Pin
    10. 6.10 Electrical Characteristics: Driver
    11. 6.11 Electrical Characteristics: Receiver
    12. 6.12 Supply Current
    13. 6.13 Transformer Driver Characteristics
    14. 6.14 Switching Characteristics: Driver
    15. 6.15 Switching Characteristics: Receiver
    16. 6.16 Insulation Characteristics Curves
    17. 6.17 Typical Characteristics
  8. Parameter Measurement Information
    1.     27
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 Device I/O Schematics
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Transient Voltages
          1. 9.2.2.1.1 39
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

GUID-1516C329-CBE3-4228-B5AF-4466C2A8929A-low.gifFigure 7-1 Open Circuit Voltage Test Circuit
GUID-9002520D-690A-407F-B901-F1D1C76787D3-low.gifFigure 7-2 VOD Test Circuit
GUID-6C70FEBA-FF00-46CD-BDC9-3C1424C43393-low.gifFigure 7-3 Driver VOD with Common-mode Loading Test Circuit
GUID-3F9C61AC-5C8B-48D5-AEF1-17EC729DCFAC-low.gifFigure 7-4 Driver VOD and VOC Without Common-Mode Loading Test Circuit
GUID-DCDCDF95-212A-46ED-A507-CA6298833CC6-low.gifFigure 7-5 Steady-State Output Voltage Test Circuit and Voltage Waveforms
GUID-D0BC6096-FCA5-4652-AAD8-66511BA51A17-low.gifFigure 7-6 VOD(RING) Waveform and Definitions
GUID-1186FAF7-C9C2-49D7-9BAB-D9429C1430C7-low.gifFigure 7-7 Input Voltage Hysteresis Test Circuit
GUID-75411314-F944-4621-94D8-B3A551880037-low.gifFigure 7-8 Driver Short-Circuit Test Circuit and Waveforms (Short Circuit applied at Time t=0)
GUID-0B6EB07E-B2D7-43E3-8816-1C5ED5D718A0-low.gifFigure 7-9 Driver Switching Test Circuit and Waveforms
GUID-8D45652E-B28D-40F0-84DB-63FD0B8EE45A-low.gifFigure 7-10 Driver Output Transition Skew Test Circuit and Waveforms
GUID-AE137ED4-A32E-4C36-A491-58E605564AE7-low.gifFigure 7-11 Driver Enable/Disable Test, D at Logic Low Test Circuit and Waveforms
GUID-A034C89D-D9EE-41BA-A2B3-D461D42A2456-low.gifFigure 7-12 Driver Enable/Disable Test, D at Logic High Test Circuit and Waveforms
GUID-ABE5CCD6-DE24-4048-9A74-9FC2AC89BB17-low.gifFigure 7-13 DE to ISODE Prop Delay Test Circuit and Waveforms
GUID-87D912A8-8F2F-4CC3-A1E8-81C8AEF7EAC2-low.gifFigure 7-14 Receiver DC Parameter Definitions
GUID-8CD1126B-127E-4125-97D6-169CB4B64F0D-low.gifFigure 7-15 Receiver Switching Test Circuit and Waveforms
GUID-950AA36E-18A6-47D3-8609-0A3A5724CC28-low.gifFigure 7-16 Receiver Enable Test Circuit and Waveforms, Data Output High
GUID-B3FEA4FE-7CBC-4639-92A5-FA09B4B7B541-low.gifFigure 7-17 Receiver Enable Test Circuit and Waveforms, Data Output Low
GUID-BFAE4B21-4547-406B-8B0E-BB9D24240FDA-low.gifFigure 7-18 Common-Mode Rejection Test Circuit
GUID-C69D9B64-D85A-4378-BA56-3E876E7F1AC9-low.gifFigure 7-19 Common-Mode Transient Immunity Test Circuit
GUID-4ACA5578-1BFE-465A-9B8C-48C9621DD8AE-low.gifFigure 7-20 Transition Times and Break-Before-Make Time Delay for D1, D2 Outputs