SLLSEY7F June   2017  – April 2020 ISO1211 , ISO1212

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.          Application Diagram
      2.      ISO121x Devices Reduce Board Temperatures vs Traditional Solutions
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—DC Specification
    10. 6.10 Switching Characteristics—AC Specification
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Sinking Inputs
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Setting Current Limit and Voltage Thresholds
          2. 9.2.1.2.2 Thermal Considerations
          3. 9.2.1.2.3 Designing for 48-V Systems
          4. 9.2.1.2.4 Designing for Input Voltages Greater Than 60 V
          5. 9.2.1.2.5 Surge, ESD, and EFT Tests
          6. 9.2.1.2.6 Multiplexing the Interface to the Host Controller
          7. 9.2.1.2.7 Status LEDs
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Sourcing Inputs
      3. 9.2.3 Sourcing and Sinking Inputs (Bidirectional Inputs)
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.2.5 Surge, ESD, and EFT Tests

Digital input modules are subject to surge (IEC 61000-4-5), electrostatic discharge or ESD (IEC 61000-4-2) and electrical fast transient or EFT (IEC 61000-4-4) tests. The surge impulse waveform has the highest energy and the widest pulse width, and is therefore the most stringent test of the three.

Figure 16 shows the application diagram for Type 1 and 3 systems. For a 1-kVPP surge test between the input terminals and protection earth (PE), a value of 1 kΩ for RTHR and 10 nF for CIN is recommended. Table 3 lists a summary of recommended component values to meet different levels of EMC requirements for Type 1 and 3 systems.

Table 3. Surge, IEC ESD and EFT

IEC 61131-2 TYPE RSENSE RTH CIN SURGE IEC ESD IEC EFT
LINE-TO-PE LINE-TO-LINE LINE-TO-FGND
Type 1 562 2.5 kΩ 10 nF ±1 kV ±1 kV ±1 kV ±6 kV ±4 kV
Type 3 562 1 kΩ 10 nF ±1 kV ±1 kV ±500 V ±6 kV ±4 kV
330 nF ±1 kV ±1 kV ±1 kV ±6 kV ±4 kV

Figure 23 shows the test setup and application circuit used for surge testing. A noise filtering capacitor of 500 pF is recommended between the FGND pin and PE (earth). The total value of effective capacitance between the FGND pin and any other ground potential (including PE) must not exceed 500 pF for optimum surge performance. For line-to-PE test (common-mode test), the FGND pin is connected to the auxiliary equipment (AE) through a decoupling network.

ISO1211 ISO1212 iso121x-surge-setup-typical-application-circuit.gif
1. For line-to-PE test, FGND is connected to the auxiliary equipment (AE) through a decoupling network.
2. A noise filtering capacitor of about 500 pF is recommended between the FGND pin and PE (earth). The total value of effective capacitance between the FGND pin and any other ground potential (including PE) must not exceed 500 pF for optimum performance.
Figure 23. Setup and Application Circuit Used for Surge Test

For higher voltage levels of surge tests or for faster systems that cannot use a large value for CIN, TVS diodes or varistors can be used to meet EMC requirements. Type 2 systems that use a smaller value for RTHR may also require TVS diodes or varistors for surge protection. Figure 24 shows an example usage of TVS diodes for surge protection. The recommended components for surge protection are VCAN26A2-03S (TVS, Vishay), EZJ-P0V420WM (Varistor, Panasonic), and GSOT36C (TVS, Vishay).

Use of the RTHR resistor also reduces the peak current requirement for the TVS diodes, making them smaller and cost effective. For example, a 2-kV surge through a 1-kΩ RTHR resistor creates only 2-A peak current. Also, because of voltage drop across the RTHR resistor in normal operation, the working voltage requirement for the varistor or TVS diodes is reduced. For example, for a RTHR value of 1 kΩ and an RSENSE value of 562 Ω, a module designed for 30-V inputs only requires 28-V TVS diodes because the RTHR resistor drops more than 2 V.

ISO1211 ISO1212 iso121x-tvs-diodes-used-instead-of-filtering-capacitor-for-surge-protection-in-faster-systems.gifFigure 24. TVS Diodes Used Instead of a Filtering Capacitor for Surge Protection in Faster Systems