SLLSFN5A June   2023  – February 2024 ISO1228

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—DC Specification
    10. 5.10 Switching Characteristics—AC Specification
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Surge Protection
      2. 7.3.2  Field Side LED Indication
      3. 7.3.3  Serial and Parallel Output option
      4. 7.3.4  Cyclic Redundancy Check (CRC)
      5. 7.3.5  FAULT Indication
      6. 7.3.6  Digital Low Pass Filter
      7. 7.3.7  SPI Register Map
      8. 7.3.8  SPI Interface Timing - Non-Daisy Chain
      9. 7.3.9  SPI Interface Timing - Daisy Chain
      10. 7.3.10 SPI Interface Timing - Burst Mode
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Sinking Type Digital Inputs
      2. 8.2.2 Sourcing Type Digital Inputs
      3. 8.2.3 Design Requirements
        1. 8.2.3.1 Detailed Design Procedure
          1. 8.2.3.1.1 Current Limit
          2. 8.2.3.1.2 Voltage Thresholds
          3. 8.2.3.1.3 Wire-Break Detection
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1 Test Circuits

GUID-20230608-SS0I-T8NG-WWFS-RPH0WBSHXLBC-low.svg Figure 6-1 Switching Characteristics Test Circuit and Voltage Waveforms
GUID-20230608-SS0I-SH6T-LNDZ-ZPN0XDKKKRQN-low.svg Figure 6-2 Input Current and Voltage Threshold Test Circuit
GUID-20230608-SS0I-PFZV-F7ZB-DDWFVM80B8XB-low.svg Figure 6-3 Enable and Disable Propagation Delay Time Test Circuit and Waveform—Logic Low State
GUID-20230608-SS0I-M4DD-BHBC-B80ZBZSBHCNZ-low.svg Figure 6-4 Enable and Disable Propagation Delay Time Test Circuit and Waveform—Logic High State
GUID-20230608-SS0I-HCXL-9Z93-2CGFXL319GMT-low.svg
A. Pass Criterion: The output must remain stable.
Figure 6-5 Common-Mode Transient Immunity Test Circuit