SLLSF22H April 2018 β June 2024 ISO1410 , ISO1412 , ISO1430 , ISO1432 , ISO1450 , ISO1452
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The differential receiver of the ISO14xx devices has failsafe protection from invalid bus states caused by:
The differential input of the RS-485 receiver is 0 in any of these conditions for a terminated transmission line. The receiver outputs a failsafe logic-high state so that the output of the receiver is not indeterminate.
The receiver thresholds are offset in the receiver failsafe protection so that the indeterminate range of the does not include a 0 V differential. The receiver output must generate a logic high when the differential input (VID) is greater than 200 mV to comply with the RS-485 standard. The receiver output must also generate a output a logic low when VID is less than β200 mV to comply with the RS-485 standard. The receiver parameters that determine the failsafe performance are VTH+, VTHβ, and VHYS. Differential signals less than β200 mV always cause a low receiver output as shown in the Electrical Characteristics table. Differential signals greater than 200 mV always cause a high receiver output. A differential input signal that is near zero is still greater than the VTH+ threshold which makes the receiver output logic high. The receiver output goes to a low state only when the differential input decreases by VHYS to less than VTH+.
The internal failsafe biasing feature removes the need for the two external resistors that are typically required with traditional isolated RS-485 transceivers as shown in Figure 9-3.