SLLSFC3A March   2020  – December 2021 ISO1640-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6.     Insulation Specifications
    7. 6.6  Safety-Related Certifications
    8. 6.7  Safety Limiting Values
    9. 6.8  Electrical Characteristics
    10. 6.9  Supply Current Characteristics
    11. 6.10 Timing Requirements
    12. 6.11 Switching Characteristics
    13. 6.12 Insulation Characteristics Curves
    14. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Isolation Technology Overview
    4. 8.4 Feature Description
      1. 8.4.1 Hot Swap
      2. 8.4.2 Protection Features
    5. 8.5 Isolator Functional Principle
      1. 8.5.1 Receive Direction (Left Diagram of Figure 1-1 )
      2. 8.5.2 Transmit Direction (Right Diagram of Figure 1-1 )
    6. 8.6 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 I2C Bus Overview
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Insulation Lifetime
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

GUID-7DE7ACE5-7332-431A-88EB-04A866504E64-low.gifFigure 7-1 Test Diagram
GUID-738E7F93-F2C9-4C06-94A4-5F63416F5B40-low.gifFigure 7-2 tLoop1 Setup and Timing Diagram
GUID-6C74E229-F6DD-4B4C-B76A-F4FDD6F5F96A-low.gifFigure 7-3 Common-Mode Transient Immunity Test Circuit
GUID-20200930-CA0I-ZFJT-D4DP-LZWVJN8VSVXV-low.gif

GUID-485A646C-AB02-4BE7-B3EF-FF56DD1FBD76-low.gif
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3ns, ZO = 50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. It is not needed in actual application.
CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 7-4 GPIO Channel Switching Characteristics Test Circuit and Voltage Waveforms
GUID-20200729-CA0I-VWP0-5GNR-HPDDTVD5XKTW-low.gif
CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Power Supply Ramp Rate = 10 mV/ns
Figure 7-5 GPIO Channel Default Output Delay Time Test Circuit and Voltage Waveforms

Figure 7-4 tUVLO Test Circuit and Timing Diagrams