SLLSFC3A March   2020  – December 2021 ISO1640-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6.     Insulation Specifications
    7. 6.6  Safety-Related Certifications
    8. 6.7  Safety Limiting Values
    9. 6.8  Electrical Characteristics
    10. 6.9  Supply Current Characteristics
    11. 6.10 Timing Requirements
    12. 6.11 Switching Characteristics
    13. 6.12 Insulation Characteristics Curves
    14. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Isolation Technology Overview
    4. 8.4 Feature Description
      1. 8.4.1 Hot Swap
      2. 8.4.2 Protection Features
    5. 8.5 Isolator Functional Principle
      1. 8.5.1 Receive Direction (Left Diagram of Figure 1-1 )
      2. 8.5.2 Transmit Direction (Right Diagram of Figure 1-1 )
    6. 8.6 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 I2C Bus Overview
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Insulation Lifetime
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2 Detailed Design Procedure

Although the ISO1640-Q1 features bidirectional data channels, the device performs optimally when side 1 (SDA1 and SCL1) is connected to a single controller or node of an I2C network while side 2 (SDA2 and SCL2) is connected to the I2C bus. The maximum load permissible on the input lines, SDA1 and SCL1, is ≤ 80 pF and on the output lines, SDA2 and SCL2, is ≤ 400 pF. In addition to the bidirectional data and clock channels for the I2C network, the ISO1644 includes 3 GPIOs which can be used for static I/O lines or for a 3 wire SPI interface. These lines are designed to support up to 50 Mbps data transfer rate.

The power-supply capacitor with a value of 0.1-µF must be placed as close to the power supply pins as possible. The recommended placement of the capacitors must be 2-mm maximum from input and output power supply pins (VCC1 and VCC2).

The minimum pullup resistors on the input lines, SDA1 and SCL1 to VCC1 must be selected in such a way that input current drawn is ≤ 3.5 mA. The minimum pullup resistors on the input lines, SDA2 and SCL2, to VCC2 must be selected in such a way that output current drawn is ≤ 50 mA. The maximum pullup resistors on the bus lines (SDA1 and SCL1) to VCC1 and on bus lines (SDA2 and SCL2) to VCC2, depends on the load and rise time requirements on the respective lines to comply with I2C protocols. For more information, see I2C Bus Pullup Resistor Calculation.

The output waveforms for SDA1 and SCL1 are captured on the oscilloscope focusing on the low VOL1 voltage offset offered with the ISO164x-Q1. This voltage offset is due to the output low level on side 1 designed to prevent a latch-up state mentioned in Section 8.5.

GUID-20200916-CA0I-KRZG-ZJW6-CTJ3BD1QNSM6-low.gifFigure 9-6 Typical ISO1640-Q1 Circuit Hookup