ISO644x General-Purpose, Reinforced, Quad-Channel Digital Isolators With Robust EMC
1 Features
- Up to 100Mbps data rate
- Robust SiO2 isolation barrier:
- Wide temperature range: –40°C to 125°C
- Up to 5000VRMS isolation rating
- Up to 10.4kV surge capability
- ±100kV/μs typical CMTI
- Supply range: 2.25V to 5.5V
- Default output high (ISO644x) and low (ISO644xF) options
- Low propagation delay: 6.2ns typical at 5V
- Robust electromagnetic compatibility (EMC)
- System-level ESD, EFT, and surge immunity
- Low emissions
- Wide-SOIC (DW-16) Package
- Safety-Related Certifications (Planned):
- DIN EN IEC 60747-17 (VDE 0884-17)
- UL 1577 component recognition program
- IEC 62368-1, IEC 61010-1, IEC 60601-1 and GB 4943.1 certifications
3 Description
The ISO644x devices are high-performance, quad-channel digital isolators designed for cost-sensitive applications requiring up to 5000VRMS isolation ratings per UL 1577. These devices are also certified by VDE, TUV, CSA, and CQC.
The ISO644x devices provide high electromagnetic immunity and low emissions at low power consumption while isolating CMOS or LVCMOS digital I/Os. ISO644x uses SiO2 as the isolation barrier. Each isolation channel has a logic input and output buffer separated by the insulation barrier. These devices come with enable pins that can be used to put the respective outputs in high impedance for parallel (multiple) control driving applications.
TheISO6441and ISO6441F devices have one reverse-direction channel.
In the event of input power or signal loss, the default output is high for devices without the suffix F and low for devices with the suffix F. See the Device Functional Modes section for further details.
| PART NUMBER(1) | PACKAGE | PACKAGE SIZE(2) |
|---|---|---|
|
ISO6441 |
Wide-SOIC (DW-16) | 10.30mm × 10.30mm |
GNDI=Input ground, GNDO=Output ground
4 Pin Configuration and Functions
Figure 4-1 ISO6441and ISO6441F Top View| PIN | Type(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | ISO6441, ISO6441F |
||
| EN1 | 7 | I | Output enable 1. Output pins on side 1 are enabled when EN1 is high or open and in high-impedance state when EN1 is low. |
| EN2 | 10 | I | Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in high-impedance state when EN2 is low. |
| GND1 | 2,8 | — | Ground connection for VCC1 |
| GND2 | 9,15 | — | Ground connection for VCC2 |
| INA | 3 | I | Input, channel A |
| INB | 4 | I | Input, channel B |
| INC | 5 | I | Input, channel C |
| IND | 11 | I | Input, channel D |
| OUTA | 14 | O | Output, channel A |
| OUTB | 13 | O | Output, channel B |
| OUTC | 12 | O | Output, channel C |
| OUTD | 6 | O | Output, channel D |
| VCC1 | 1 | — | Power supply, side 1 |
| VCC2 | 16 | — | Power supply, side 2 |
