SLLSFJ6G
December 2019 – February 2023
ISO6740
,
ISO6741
,
ISO6742
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description Continued
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Power Ratings
7.6
Insulation Specifications
7.7
Safety-Related Certifications
7.8
Safety Limiting Values
7.9
Electrical Characteristics—5-V Supply
7.10
Supply Current Characteristics—5-V Supply
7.11
Electrical Characteristics—3.3-V Supply
7.12
Supply Current Characteristics—3.3-V Supply
7.13
Electrical Characteristics—2.5-V Supply
7.14
Supply Current Characteristics—2.5-V Supply
7.15
Electrical Characteristics—1.8-V Supply
7.16
Supply Current Characteristics—1.8-V Supply
7.17
Switching Characteristics—5-V Supply
7.18
Switching Characteristics—3.3-V Supply
7.19
Switching Characteristics—2.5-V Supply
7.20
Switching Characteristics—1.8-V Supply
7.21
Insulation Characteristics Curves
7.22
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Electromagnetic Compatibility (EMC) Considerations
9.4
Device Functional Modes
9.4.1
Device I/O Schematics
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curve
10.2.3.1
Insulation Lifetime
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
PCB Material
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
14.1
Package Option Addendum
14.2
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
DW|16
MSOI003I
Thermal pad, mechanical data (Package|Pins)
DW|16
QFND505A
9.4.1
Device I/O Schematics
Figure 9-3
Device I/O Schematics