SLLSFG4F December   2019  – June 2024 ISO6740-Q1 , ISO6741-Q1 , ISO6742-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—5-V Supply
    10. 5.10 Supply Current Characteristics—5-V Supply
    11. 5.11 Electrical Characteristics—3.3-V Supply
    12. 5.12 Supply Current Characteristics—3.3-V Supply
    13. 5.13 Electrical Characteristics—2.5-V Supply 
    14. 5.14 Supply Current Characteristics—2.5-V Supply
    15. 5.15 Electrical Characteristics—1.8-V Supply
    16. 5.16 Supply Current Characteristics—1.8-V Supply
    17. 5.17 Switching Characteristics—5-V Supply
    18. 5.18 Switching Characteristics—3.3-V Supply
    19. 5.19 Switching Characteristics—2.5-V Supply
    20. 5.20 Switching Characteristics—1.8-V Supply
    21. 5.21 Insulation Characteristics Curves
    22. 5.22 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
        1. 8.2.3.1 Insulation Lifetime
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWW|16
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.18 Switching Characteristics—3.3-V Supply

VCC1 = VCC2 = 3.3 V ±10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time at 100kbps

See Figure 6-1		 11 18 ns
PWD Pulse width distortion(1) |tPHL – tPLH| 0.5 7 ns
tsk(o) Channel-to-channel output skew time(2) Same-direction channels 6 ns
tsk(pp) Part-to-part skew time(3) 7 ns
tr Output signal rise time See Figure 6-1 1.6 3.2 ns
tf Output signal fall time 1.6 3.2 ns
tPHZ Disable propagation delay, high-to-high impedance output See Figure 6-2 23.2 34.4 ns
tPLZ Disable propagation delay, low-to-high impedance output 23.2 34.4 ns
tPZH Enable propagation delay, high impedance-to-high output for ISO674x 16.6 23 ns
tPZL Enable propagation delay, high impedance-to-low output for ISO674x 16.6 23 ns
tPU Time from UVLO to valid output data 300 µs
tDO Default output delay time from input power loss Measured from the time VCC goes below 1.2 V. See Figure 6-3 0.1 0.3 µs
tie Time interval error 216 – 1 PRBS data at 50 Mbps 1 ns
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.