SLLS755R July   2006  – October 2024 ISO7220A , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221B , ISO7221C , ISO7221M

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—5-V VCC1 and VCC2 Supplies
    10. 5.10 Electrical Characteristics—5-V VCC1 and 3.3-V VCC2 Supply
    11. 5.11 Electrical Characteristics—3.3-V VCC1 and 5-V VCC2 Supply
    12. 5.12 Electrical Characteristics—3.3-V VCC1 and VCC2 Supplies
    13. 5.13 Electrical Characteristics—2.8-V VCC1 and VCC2 Supplies
    14. 5.14 Switching Characteristics—5-V VCC1 and VCC2 Supplies
    15. 5.15 Switching Characteristics—5-V VCC1 and 3.3-V VCC2 Supply
    16. 5.16 Switching Characteristics—3.3-VCC1 and 5-V VCC2 Supplies
    17. 5.17 Switching Characteristics—3.3-V VCC1 and VCC2 Supplies
    18. 5.18 Switching Characteristics—2.8-V VCC1 and VCC2 Supplies
    19. 5.19 Insulation Characteristics Curves
    20. 5.20 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Insulation Lifetime
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Related Links
    4. 9.4 Receiving Notification of Documentation Updates
    5. 9.5 Support Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) ISO7220x
ISO7221x
UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance Low-K Thermal Resistance(2) 212 °C/W
High-K Thermal Resistance 122
RθJC(top) Junction-to-case (top) thermal resistance 69.1 °C/W
RθJB Junction-to-board thermal resistance 47.7 °C/W
ψJT Junction-to-top characterization parameter 15.2 °C/W
ψJB Junction-to-board characterization parameter 47.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
 
Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages.