SLLS867L September   2007  – October 2024 ISO7230C , ISO7231C , ISO7231M

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: VCC1 and VCC2 at 3.3 V
    10. 6.10 Electrical Characteristics: VCC1 and VCC2 at 5-V
    11. 6.11 Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V
    12. 6.12 Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V
    13. 6.13 Switching Characteristics: VCC1 and VCC2 at 3.3-V
    14. 6.14 Switching Characteristics: VCC1 and VCC2 at 5-V
    15. 6.15 Switching Characteristics: VCC1 at 3.3-V and VCC2 at 5-V
    16. 6.16 Switching Characteristics: VCC1 at 5-V, VCC2 at 3.3-V
    17. 6.17 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Performance Plots
        1. 9.2.3.1 Insulation Characteristics Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PCB Material
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
GENERAL
CLR External clearance(1) Shortest terminal-to-terminal distance through air 8 mm
CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface 8 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) 0.008 mm
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 400 V
Material group II
Overvoltage category Rated mains voltage ≤150 VRMS I-IV
Rated mains voltage ≤300 VRMS I-III
Rated mains voltage ≤400 VRMS I-II
DIN EN IEC 60747-17 (VDE 0884-17):(2)
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 560 VPK
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification);
VTEST = 1.2 x VIOTM, t= 1 s (100% production)
4000 VPK
qpd Apparent charge(3) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM , tm = 10 s ≤5 pC
Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.3 × VIORM, tm = 10 s ≤5
Method b: At routine test (100% production);
Vini = 1.2 x VIOTM, tini = 1s;
Vpd(m) = 1.5 x VIORM, tm = 1s (method b1) or
Vpd(m) = Vini, tm = tini (method b2)
≤5
CIO Barrier capacitance, input to output(4) VIO = 0.4 x sin (2πft), f = 1 MHz 1 pF
RIO Isolation resistance, input to output(4) VIO = 500 V, TA = 25°C >1012 Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C >1011
VIO = 500 V at TS = 150°C >109
Pollution degree 2
Climatic category 40/125/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO = 2500 VRMS, t = 60 s (qualification); VTEST = 1.2 × VISO = 3000 VRMS, t = 1 s (100% production) 2500 VRMS
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
This coupler is suitable for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
Apparent charge is electrical discharge caused by a partial discharge (pd).
All pins on each side of the barrier tied together creating a two-terminal device