SLLSEK5B July 2015 – May 2017 ISO7340-Q1 , ISO7341-Q1 , ISO7342-Q1
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The ISO734x-Q1 family of devices provides galvanic isolation up to 3000 VRMS for 1 minute per UL 1577 and 4242 VPK per VDE V 0884-10. These devices have four isolated channels comprised of logic input and output buffers separated by a silicon dioxide (SiO2) insulation barrier.
The ISO7340-Q1 device has four channels in forward direction, the ISO7341-Q1 device has three forward and one reverse-direction channels, and the ISO7342-Q1 device has two forward and two reverse-direction channels. In case of input power or signal loss, the default output is low for orderable part numbers with suffix F and high for orderable part numbers without suffix F. See the Device Functional Modes section for further details.
PART NUMBER | PACKAGE | BODY SIZE |
---|---|---|
ISO7340-Q1 | SOIC (16) | 10.30 mm × 7.50 mm |
ISO7341-Q1 | ||
ISO7342-Q1 |
Changes from A Revision (August 2016) to B Revision
Changes from * Revision (July 2016) to A Revision
Used in conjunction with isolated power supplies, these devices help prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. The ISO734x-Q1 device has integrated noise filter for harsh industrial environment where short noise pulses may be present at the device input pins. The ISO734x-Q1 device has TTL input thresholds and operates from 3-V to 5.5-V supply levels. Through innovative chip design and layout techniques, electromagnetic compatibility of the ISO734x-Q1 family of devices has been significantly enhanced to enable system-level ESD, EFT, surge, and emissions compliance.
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | NO. | ||||
ISO7340-Q1 | ISO7341-Q1 | ISO7342-Q1 | |||
EN | 10 | — | — | I | Output enable. All output pins are enabled when EN is high or disconnected and disabled when EN is low. |
EN1 | — | 7 | 7 | I | Output enable 1. Output pins on side-1 are enabled when EN1 is high or disconnected and disabled when EN1 is low. |
EN2 | — | 10 | 10 | I | Output enable 2. Output pins on side-2 are enabled when EN2 is high or disconnected and disabled when EN2 is low. |
GND1 | 2 | 2 | 2 | — | Ground connection for VCC1 |
8 | 8 | 8 | |||
GND2 | 9 | 9 | 9 | — | Ground connection for VCC2 |
15 | 15 | 15 | |||
INA | 3 | 3 | 3 | I | Input, channel A |
INB | 4 | 4 | 4 | I | Input, channel B |
INC | 5 | 5 | 12 | I | Input, channel C |
IND | 6 | 11 | 11 | I | Input, channel D |
NC | 7 | — | — | — | No connect pins are floating with no internal connection |
OUTA | 14 | 14 | 14 | O | Output, channel A |
OUTB | 13 | 13 | 13 | O | Output, channel B |
OUTC | 12 | 12 | 5 | O | Output, channel C |
OUTD | 11 | 6 | 6 | O | Output, channel D |
VCC1 | 1 | 1 | 1 | — | Power supply, VCC1 |
VCC2 | 16 | 16 | 16 | — | Power supply, VCC2 |