SLLSE45F December   2010  – July 2015 ISO7420E , ISO7420FE , ISO7421E , ISO7421FE

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: VCC1 and VCC2 = 5 V ± 10%
    6. 6.6  Electrical Characteristics: VCC1 = 5 V ± 10%, VCC2 = 3.3 V ± 10%
    7. 6.7  Electrical Characteristics: VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%
    8. 6.8  Electrical Characteristics: VCC1 and VCC2 = 3.3 V ± 10%
    9. 6.9  Power Dissipation Characteristics
    10. 6.10 Switching Characteristics: VCC1 and VCC2 = 5 V ± 10%
    11. 6.11 Switching Characteristics: VCC1 = 5 V ± 10%, VCC2 = 3.3 V ± 10%
    12. 6.12 Switching Characteristics: VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%
    13. 6.13 Switching Characteristics: VCC1 and VCC2 = 3.3 V ± 10%
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Insulation and Safety-Related Specifications for D-8 Package
      2. 8.3.2 Insulation Characteristics
      3. 8.3.3 Regulatory Information
      4. 8.3.4 Life Expectancy vs Working Voltage
      5. 8.3.5 Safety Limiting Values
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematic
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Supply Current Equations
          1. 9.2.2.1.1 ISO7420
          2. 9.2.2.1.2 ISO7421
        2. 9.2.2.2 Typical Supply Current Equations:
          1. 9.2.2.2.1 ISO7420
          2. 9.2.2.2.2 ISO7421
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

ISO742x utilize single-ended TTL-logic switching technology. Its supply voltage range is from 3 V to 5.5 V for both supplies, VCC1 and VCC2. When designing with digital isolators, it is important to keep in mind that due to the single-ended design structure, digital isolators do not conform to any specific interface standard and are only intended for isolating single-ended CMOS or TTL digital signal lines. The isolator is typically placed between the data controller (i.e. μC or UART), and a data converter or a line transceiver, regardless of the interface type or standard.

9.2 Typical Application

ISO7421 can be used with Texas Instruments' mixed signal micro-controller, digital-to-analog converter, transformer driver, and voltage regulator to create an isolated 4-20 mA current loop.

ISO7420E ISO7420FE ISO7421E ISO7421FE typ_application_sllse45.gifFigure 23. Isolated 4-20 mA Current Loop

9.2.1 Design Requirements

Unlike optocouplers, which require external components to improve performance, provide bias, or limit current, the ISO742x only require two external bypass capacitors to operate.

9.2.2 Detailed Design Procedure

9.2.2.1 Maximum Supply Current Equations

(Calculated over recommended operating temperature range and Silicon process variation)

9.2.2.1.1 ISO7420

At VCC1 = VCC2 = 3.3V ± 10%

Equation 1. ICC1(max) = ICC1_Q (max) + 1.791 x 10-2 x f
Equation 2. ICC2(max) = ICC2_Q (max) + 1.687 x 10-2 x f + 3.570 x 10-3 x f x CL

At VCC1 = VCC2 = 5V ± 10%

Equation 3. ICC1(max) = ICC1_Q (max) + 3.152 x 10-2 x f
Equation 4. ICC2(max) = ICC2_Q (max) + 2.709 x 10-2 x f + 5.365 x 10-3 x f x CL

9.2.2.1.2 ISO7421

At VCC1 = VCC2 = 3.3V ± 10%

Equation 5. ICC1(max) = ICC1_Q (max) + 1.726 x 10-2 x f + 1.785 x 10-3 x f x CL
Equation 6. ICC2(max) = ICC2_Q (max) + 1.726 x 10-2 x f + 1.785 x 10-3 x f x CL

At VCC1 = VCC2 = 5V ± 10%

Equation 7. ICC1(max) = ICC1_Q (max) + 2.920 x 10-2 x f + 2.682 x 10-3 x f x CL
Equation 8. ICC2(max) = ICC2_Q (max) + 2.920 x 10-2 x f + 2.682 x 10-3 x f x CL

ICC1_Q (max) and ICC2_Q (max) are equivalent to the maximum supply currents measured in mA under DC input conditions (provided in the specification tables of this data sheet); f is data rate in Mbps of both channels; CL is the capacitive load in pF of both channels. ICC1(max) and ICC2(max) are measured in mA.

9.2.2.2 Typical Supply Current Equations:

(Calculated over recommended operating temperature range and Silicon process variation)

9.2.2.2.1 ISO7420

At VCC1 = VCC2 = 3.3V

Equation 9. ICC1(typ) = ICC1_Q (typ) + 1.528 x 10-2 x f
Equation 10. ICC2(typ) = ICC2_Q (typ) + 1.637 x 10-2 x f + 3.275 x 10-3 x f x CL

At VCC1 = VCC2 = 5V

Equation 11. ICC1(typ) = ICC1_Q (typ) + 2.640 x 10-2 x f
Equation 12. ICC2(typ) = ICC2_Q (typ) + 2.502 x 10-2 x f + 4.919 x 10-3 x f x CL

9.2.2.2.2 ISO7421

At VCC1 = VCC2 = 3.3V

Equation 13. ICC1(typ) = ICC1_Q (typ) + 1.567 x 10-2 x f + 1.640 x 10-3 x f x CL
Equation 14. ICC2(typ) = ICC2_Q (typ) + 1.567 x 10-2 x f + 1.640 x 10-3 x f x CL

At VCC1 = VCC2 = 5V

Equation 15. ICC1(typ) = ICC1_Q (typ) + 2.550 x 10-2 x f + 2.416 x 10-3 x f x CL
Equation 16. ICC2(typ) = ICC2_Q (typ) + 2.550 x 10-2 x f + 2.461 x 10-3 x f x CL

ICC1_Q (typ) and ICC2_Q (typ) are equivalent to the typical supply currents measured in mA under DC input conditions (provided in the specification tables of this data sheet); f is data rate in Mbps of each channel; CL is the capacitive load in pF of each channel. ICC1(typ) and ICC2(typ) are measured in mA.

ISO7420E ISO7420FE ISO7421E ISO7421FE ddp_iso7420_sllse45.gifFigure 24. Typical ISO7420 Circuit Hookup
ISO7420E ISO7420FE ISO7421E ISO7421FE ddp_iso7421_sllse45.gifFigure 25. Typical ISO7421 Circuit Hookup

9.2.3 Application Curves

ISO7420E ISO7420FE ISO7421E ISO7421FE eye1_pat_llse45.gifFigure 26. ISO7420FE Typical Eye Diagram at 50 MBPS, 3.3 V Operation
ISO7420E ISO7420FE ISO7421E ISO7421FE eye2_pat_llse45.gifFigure 27. ISO7420FE Typical Eye Diagram at 100 MBPS, 3.3 V Operation