SLLSFB3C September   2019  – February 2024 ISO7741E-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Rating
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—5-V Supply
    10. 5.10 Supply Current Characteristics—5-V Supply
    11. 5.11 Electrical Characteristics—3.3-V Supply
    12. 5.12 Supply Current Characteristics—3.3-V Supply
    13. 5.13 Electrical Characteristics—2.5-V Supply
    14. 5.14 Supply Current Characteristics—2.5-V Supply
    15. 5.15 Switching Characteristics—5-V Supply
    16. 5.16 Switching Characteristics—3.3-V Supply
    17. 5.17 Switching Characteristics—2.5-V Supply
    18. 5.18 Insulation Characteristics Curves
    19. 5.19 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
        1. 8.2.3.1 Insulation Lifetime
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Material
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Insulation Specifications

PARAMETERTEST CONDITIONSVALUEUNIT
DW-16
CLRExternal clearance(1)Shortest terminal-to-terminal distance through air>8mm
CPGExternal creepage(1)Shortest terminal-to-terminal distance across the package surface>8mm
DTIDistance through the insulationMinimum internal gap (internal clearance)>21mm
CTIComparative tracking indexDIN EN 60112 (VDE 0303-11); IEC 60112>600V
Material groupAccording to IEC 60664-1I
Overvoltage category per IEC 60664-1Rated mains voltage ≤ 300 VRMSI-IV
Rated mains voltage ≤ 600 VRMSI-IV
Rated mains voltage ≤ 1000 VRMSI-III
DIN EN IEC 60747 (VDE 0884-17)(2)
VIORMMaximum repetitive peak isolation voltageAC voltage (bipolar)2121VPK
VIOWMMaximum working isolation voltageAC voltage; Time dependent dielectric breakdown (TDDB) Test; See Figure 8-71500VRMS
DC voltage2121VDC
VIOTMMaximum transient isolation voltageVTEST = VIOTM,
t = 60 s (qualification);
VTEST = 1.2 x VIOTM,
t= 1 s (100% production)		8000VPK
VIMP Maximum impulse voltage(3) Tested in air, 1.2/50-µs waveform per IEC 62368-1 8000 VPK
VIOSMMaximum surge isolation voltage(4)VIOSM ≥ 1.3 × VIMP; Tested in oil (qualification test), 1.2/50-µs waveform per IEC 62368-112800VPK
qpdApparent charge(5)Method a, After Input-output safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 x VIORM, tm = 10 s		≤5pC
Method a, After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.6 x VIORM, tm = 10 s		≤5
Method b; At routine test (100% production);
Vini = 1.2 × VIOTM, tini = 1 s;
Vpd(m) = 1.875 × VIORM, tm = 1 s (method b1) or
Vpd(m) = Vini, tm=tini (method b2)		≤5
CIOBarrier capacitance, input to output(6)VIO = 0.4 x sin (2pft), f = 1 MHz≅1pF
RIOIsolation resistance(6)VIO = 500 V, TA = 25°C>1012Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C>1011
VIO = 500 V at TS = 150°C>109
Pollution degree2
Climatic category40/150/21
UL 1577
VISOMaximum withstanding isolation voltageVTEST = VISO, t = 60 s (qualification),
VTEST = 1.2 x VISO, t = 1 s (100% production)		5000VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these specifications.
(2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air to determine the intrinsic surge immunity of the isolation barrier.
(4) Testing is carried out in oil to determine the surge immunity of the package.
(5) Apparent charge is electrical discharge caused by a partial discharge (pd).
(6) All pins on each side of the barrier tied together creating a two-terminal device.