SLLSFW6 March   2024 ISOUSB211-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply Options
      2. 7.3.2  Power Up
      3. 7.3.3  Symmetric Operation, Dual-Role Port and Role-Reversal
      4. 7.3.4  Connect and Speed Detection
      5. 7.3.5  Disconnect Detection
      6. 7.3.6  Reset
      7. 7.3.7  LS/FS Message Traffic
      8. 7.3.8  HS Message Traffic
      9. 7.3.9  Equalization and Pre-emphasis
      10. 7.3.10 L2 Power Management State (Suspend) and Resume
      11. 7.3.11 L1 Power Management State (Sleep) and Resume
      12. 7.3.12 HS Test Mode Support
      13. 7.3.13 CDP Advertising
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Isolated Host or Hub
      2. 8.1.2 Isolated Peripheral - Self-Powered
      3. 8.1.3 Isolated Peripheral - Bus-Powered
      4. 8.1.4 Application Curve
        1. 8.1.4.1 Insulation Lifetime
    2. 8.2 Meeting USB2.0 HS Eye-Diagram Specifications
    3. 8.3 Thermal Considerations
      1. 8.3.1 VBUS / V3P3V Power
      2. 8.3.2 VCCx / V1P8Vx Power
      3. 8.3.3 Example Configuration 1
      4. 8.3.4 Example Configuration 2
      5. 8.3.5 Example Configuration 3
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Layout Example
        2. 8.5.1.2 PCB Material
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • DP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.5 Example Configuration 3

In the application example shown in Figure 8-8, ISOUSB211-Q1 is powered using USB VBUS on the connector side, and a local 3.3-V digital supply on the microcontroller side to generate V3P3Vx. The internal LDOs are used to generate V1P8Vx on both sides like in Thermal ConsiderationsThermal ConsiderationsVBUS / V3P3V PowerVCCx / V1P8Vx PowerExample Configuration 1Example Configuration 2Example Configuration 3Example Configuration 3. However, the VCC1 and VCC2 are connected to VBUS and 3.3 VLV, not directly like in Thermal ConsiderationsThermal ConsiderationsVBUS / V3P3V PowerVCCx / V1P8Vx PowerExample Configuration 1Example Configuration 2Example Configuration 3Example Configuration 3, but through resistors R1 (20 Ω, 250 mW) and R2 (5 Ω, 50 mW) respectively.

The external resistors drop voltage, and dissipate power, helping reduce the power dissipation within ISOUSB211-Q1, and the corresponding temperature rise. The resistor values are decided keeping in mind that the VCCx voltage can be as low as 2.4 V. Additional 1-μF capacitors are needed on VCCx pins.

In this scenario, the total power consumption inside the IC from both sides taken together is:

VBUS1 × IVBUS1 + VBUS1 × IVCC1 - 20 Ω × IVCC1× IVCC1+ V3P3V2 × I3P3V2 + V3P3V2 × IVCC2- 5 Ω × IVCC2× IVCC2

Assuming 5.25 V as the maximum value of VBUS, and 3.5 V as the maximum value of the 3.3-V local supply, the internal power dissipation is calculated as

5.25 V×13.5 mA + 5.25 V×96 mA - 20 Ω×96 mA×96 mA + 3.5 V×13.5 mA+3.5 V×96 mA - 5 Ω×96 mA×96 mA = 728 mW.

Since the junction-to-air thermal resistance is 44.2°C/W, this power dissipation results in a 33°C internal temperature rise. Ambient temperature up to 117°C can be supported for this configuration.

This configuration offers a middle path between Thermal ConsiderationsThermal ConsiderationsVBUS / V3P3V PowerVCCx / V1P8Vx PowerExample Configuration 1Example Configuration 2Example Configuration 3Example Configuration 3 and Thermal ConsiderationsThermal ConsiderationsVBUS / V3P3V PowerVCCx / V1P8Vx PowerExample Configuration 1Example Configuration 2Example Configuration 3Example Configuration 3, achieving lower temperature rise, and higher ambient temperature operation, with the addition of only two resistors and two capacitors.

GUID-20220119-SS0I-R6WF-0KJT-X9TW7FR9TMHJ-low.svgFigure 8-8 Using ISOUSB211-Q1 with Resistors in series with VCCx pins.