SLLSFW6 March   2024 ISOUSB211-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply Options
      2. 7.3.2  Power Up
      3. 7.3.3  Symmetric Operation, Dual-Role Port and Role-Reversal
      4. 7.3.4  Connect and Speed Detection
      5. 7.3.5  Disconnect Detection
      6. 7.3.6  Reset
      7. 7.3.7  LS/FS Message Traffic
      8. 7.3.8  HS Message Traffic
      9. 7.3.9  Equalization and Pre-emphasis
      10. 7.3.10 L2 Power Management State (Suspend) and Resume
      11. 7.3.11 L1 Power Management State (Sleep) and Resume
      12. 7.3.12 HS Test Mode Support
      13. 7.3.13 CDP Advertising
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Isolated Host or Hub
      2. 8.1.2 Isolated Peripheral - Self-Powered
      3. 8.1.3 Isolated Peripheral - Bus-Powered
      4. 8.1.4 Application Curve
        1. 8.1.4.1 Insulation Lifetime
    2. 8.2 Meeting USB2.0 HS Eye-Diagram Specifications
    3. 8.3 Thermal Considerations
      1. 8.3.1 VBUS / V3P3V Power
      2. 8.3.2 VCCx / V1P8Vx Power
      3. 8.3.3 Example Configuration 1
      4. 8.3.4 Example Configuration 2
      5. 8.3.5 Example Configuration 3
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Layout Example
        2. 8.5.1.2 PCB Material
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • DP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.1 Isolated Host or Hub

Figure 8-1 shows an application for isolating a host or a hub using ISOUSB211-Q1. In this example, on the microntroller side, V3P3V1 and VBUS1 are together connected to an external 3.3-V supply. The V1P8V1 supply is generated using the internal 1.8-V LDO by providing 3.3-V supply to VCC1. On the connector side, the VBUS from the USB connector is connected to VBUS2 and the V3P3V2 supply is generated using the internal 3.3-V LDO. VCC2 and V1P8V2 are together connected to an external 1.8-V supply derived from VBUS. Please refer to Thermal ConsiderationsThermal ConsiderationsVBUS / V3P3V PowerVCCx / V1P8Vx PowerExample Configuration 1Example Configuration 2Example Configuration 3Example Configuration 3 for options on optimizing power dissipation inside ISOUSB211-Q1 as required.

Decoupling capacitors are placed next to ISOUSB211-Q1 according to the recommendations provided in the Power Supply Recommendations section. An isolated DC-DC converter (such as the SN6505) is to provide power to the VBUS using the 3.3-V local supply. Note that, for a host or hub, the USB standard requires a 120-μF capacitor to be placed on the VBUS so as to be able provide in-rush current when a downstream peripheral is attached. In addition, a 100-nF capacitor is recommended close to the VBUS pin to handle tranisent currents.

ESD diodes with low capacitance and low dynamic resistance, such as PESD5V0C1USF, may be placed on D+ and D- lines. A ferrite bead, with dc resistance less than 100 mΩ, may be optionally placed between VBUS pin of the connector and the VBUS pin of ISOUSB211-Q1, as shown in the figure, to suppress transients such as ESD.

If the isolated power supply used is capable of providing >1.5 A current on the VBUS, the port can be configured as a CDP port according to Battery Charger specification BC 1.2. To do this, the CDPENZ2 pin of ISOUSB211-Q1 must be connected to ground as shown. Under this condition ISOUSB211-Q1 responds to BC 1.2 signaling from a connected peripheral indicating to the peripheral that the port is capable of supply 1.5-A current on VBUS.

GUID-20200820-CA0I-VXQ6-MFJB-RZD6JHZBM5ZX-low.gifFigure 8-1 Isolated Host or Hub with ISOUSB211-Q1