SLLSFW6 March   2024 ISOUSB211-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 Test Circuits
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply Options
      2. 7.3.2  Power Up
      3. 7.3.3  Symmetric Operation, Dual-Role Port and Role-Reversal
      4. 7.3.4  Connect and Speed Detection
      5. 7.3.5  Disconnect Detection
      6. 7.3.6  Reset
      7. 7.3.7  LS/FS Message Traffic
      8. 7.3.8  HS Message Traffic
      9. 7.3.9  Equalization and Pre-emphasis
      10. 7.3.10 L2 Power Management State (Suspend) and Resume
      11. 7.3.11 L1 Power Management State (Sleep) and Resume
      12. 7.3.12 HS Test Mode Support
      13. 7.3.13 CDP Advertising
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Isolated Host or Hub
      2. 8.1.2 Isolated Peripheral - Self-Powered
      3. 8.1.3 Isolated Peripheral - Bus-Powered
      4. 8.1.4 Application Curve
        1. 8.1.4.1 Insulation Lifetime
    2. 8.2 Meeting USB2.0 HS Eye-Diagram Specifications
    3. 8.3 Thermal Considerations
      1. 8.3.1 VBUS / V3P3V Power
      2. 8.3.2 VCCx / V1P8Vx Power
      3. 8.3.3 Example Configuration 1
      4. 8.3.4 Example Configuration 2
      5. 8.3.5 Example Configuration 3
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Layout Example
        2. 8.5.1.2 PCB Material
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • DP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Meeting USB2.0 HS Eye-Diagram Specifications

The USB2.0 standadards specifies TX and RX eye-diagram templates that must be met at the connector. The horizontal eye-opening achieved at the connector is a combination of the performance at the microcontroller, the additive jitter of the ISOUSB211-Q1, and the inter-symbol interference resulting from the insertion loss of D+/D- board traces. For best performance, it is recommended to minimize the length of D+/D- board traces from the MCU to ISOUSB211-Q1, and from ISOUSB211-Q1 to the connector. Vias and stubs on D+/D- lines must be avoided.

The ISOUSB211-Q1 has inbuilt programmable receive equalization and transmit pre-emphasis to cancel signal loss caused by board traces, which helps in meeting USB2.0 high-speed TX and RX eye-diagrams. EQ11 and EQ10 can be chosen based on the length of D+/D- board traces and corresponding channel loss estimated on side 1, and similarly EQ21 and EQ20 for side 2. The EQxx pins can be connected to ground, connected to 3.3-V supply or left floating, together creating 9 different equalization levels.

Typical 45-Ohm traces in FR4 have an insertion loss of about 0.15 dB/inch for 480 Mbps signaling. This number can be used to arrive at an estimate for the amount of Equalization/Pre-emphasis needed and the corresponding EQ settings. Further adjustments to the EQxx settings can be made by observing the transmit eye-diagram at the connector, and chossing the setting that gives the best eye-opening. Chosing the right setting for the transmit path will also result in an optimum performance for the receive path. Refer to Compensate for Channel Loss with Equalizer Settings on High-Speed USB Isolators application note for details. If the trace lengths are very small, no equalization may be needed, and the EQxx pins can be connected to ground.