SLLSFW6 March   2024 ISOUSB211-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply Options
      2. 7.3.2  Power Up
      3. 7.3.3  Symmetric Operation, Dual-Role Port and Role-Reversal
      4. 7.3.4  Connect and Speed Detection
      5. 7.3.5  Disconnect Detection
      6. 7.3.6  Reset
      7. 7.3.7  LS/FS Message Traffic
      8. 7.3.8  HS Message Traffic
      9. 7.3.9  Equalization and Pre-emphasis
      10. 7.3.10 L2 Power Management State (Suspend) and Resume
      11. 7.3.11 L1 Power Management State (Sleep) and Resume
      12. 7.3.12 HS Test Mode Support
      13. 7.3.13 CDP Advertising
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Isolated Host or Hub
      2. 8.1.2 Isolated Peripheral - Self-Powered
      3. 8.1.3 Isolated Peripheral - Bus-Powered
      4. 8.1.4 Application Curve
        1. 8.1.4.1 Insulation Lifetime
    2. 8.2 Meeting USB2.0 HS Eye-Diagram Specifications
    3. 8.3 Thermal Considerations
      1. 8.3.1 VBUS / V3P3V Power
      2. 8.3.2 VCCx / V1P8Vx Power
      3. 8.3.3 Example Configuration 1
      4. 8.3.4 Example Configuration 2
      5. 8.3.5 Example Configuration 3
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Layout Example
        2. 8.5.1.2 PCB Material
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • DP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Safety Limiting Values

Safety limiting(1) intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DP-28 PACKAGE
IS Safety input, output, or supply current RθJA = 44.2°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C 514 mA
RθJA = 44.2°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C 785 mA
RθJA = 44.2°C/W, VI = 1.94 V, TJ = 150°C, TA = 25°C 1457 mA
PS Safety input, output, or total power RθJA = 44.2°C/W, TJ = 150°C, TA = 25°C 2828 mW
TS Maximum safety temperature 150 °C
(1) The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ, specified for the device. The IS and PS parameters represent the safety current and safety power respectively. The maximum limits of IS and PS should not be exceeded. These limits vary with the ambient temperature, TA. 

The junction-to-air thermal resistance, RθJA, in the table is that of a device installed on a high-K test board for leaded surface-mount packages. Use these equations to calculate the value for each parameter:
TJ = TA + RθJA × P, where P is the power dissipated in the device.
TJ(max) = TS = TA + RθJA × PS, where TJ(max) is the maximum allowed junction temperature.
PS = IS × VI, where VI is the maximum input voltage.