SLLSF86C May   2018  – March 2022 ISOW1412 , ISOW1432

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description Continued
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  Recommended Operating Conditions
    3. 8.3  Thermal Information
    4. 8.4  Power Ratings
    5. 8.5  Insulation Specifications
    6. 8.6  Safety-Related Certifications
    7. 8.7  Safety Limiting Values
    8. 8.8  Electrical Characteristics
    9. 8.9  Supply Current Characteristics at VISOOUT = 3.3 V
    10. 8.10 Supply Current Characteristics at  VISOOUT = 5 V
    11. 8.11 Switching Characteristics at VISOOUT = 3.3 V
    12. 8.12 Switching Characteristics at VISOOUT = 5 V
    13. 8.13 Insulation Characteristics Curves
    14. 8.14 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Power Isolation
    3. 10.3 Signal Isolation
    4. 10.4 RS-485
    5. 10.5 Functional Block Diagram
    6. 10.6 Feature Description
      1. 10.6.1 Power-Up and Power-Down Behavior
      2. 10.6.2 Protection Features
      3. 10.6.3 Failsafe Receiver
      4. 10.6.4 Glitch-Free Power Up and Power Down
    7. 10.7 Device Functional Modes
    8. 10.8 Device I/O Schematics
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Data Rate, Bus Length and Bus Loading
        2. 11.2.2.2 Stub Length
        3. 11.2.2.3 Insulation Lifetime
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 Support Resources
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.5 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
GENERAL
CLR External clearance(1) Shortest terminal-to-terminal distance through air > 8 mm
CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface > 8 mm
DTI Distance through the insulation Minimum internal gap (internal clearance – capacitive signal isolation) > 17 um
Minimum internal gap (internal clearance- transformer power isolation) > 120
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 > 600 V
Material group According to IEC 60664-1 I
Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 150 VRMS I-IV
Rated mains voltage ≤ 300 VRMS I-IV
Rated mains voltage ≤ 600 VRMS I-IV
Rated mains voltage ≤ 1000 VRMS I-III
DIN VDE V 0884-11:2017-01(2)
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1500 VPK
VIOWM Maximum working isolation voltage AC voltage (sine wave) Time dependent dielectric breakdown (TDDB) test 1000 VRMS
DC voltage 1500 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification);
VTEST = 1.2 × VIOTM, t = 1 s (100% production)		 7071 VPK
VIOSM Maximum surge isolation voltage ISOW14x2(3) Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.6 × VIOSM = 10 kVPK (qualification)		 6250 VPK
VIOSM Maximum surge isolation voltage ISOW14x2B(3) Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.3 × VIOSM = 7.8 kVPK (qualification)		 6000 VPK
qpd Apparent charge(4) Method a: After I/O safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 × VIORM , tm = 10 s		 ≤ 5 pC
Method a: After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
ISOW14x2: Vpd(m) = 1.6 × VIORM , tm = 10 s. ISOW14x2B: Vpd(m) = 1.2 × VIORM , tm = 10 s		 ≤ 5
Method b1: At routine test (100% production) and preconditioning (type test)
Vini = 1.2 × VIOTM, tini = 1 s;
ISOW14x2: Vpd(m) = 1.875 × VIORM , tm = 1 s. ISOW14x2B: Vpd(m) = 1.5 × VIORM , tm = 1 s		 ≤ 5
CIO Barrier capacitance, input to output(5) VIO = 0.4 sin (2πft), f = 1 MHz ~3.5 pF
RIO Isolation resistance, input to output(5) VIO = 500 V, TA = 25°C > 1012 Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C > 1011 Ω
VIO = 500 V at TS = 150°C > 109 Ω
Pollution degree 2
Climatic category 40/125/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO = 5000 VRMS, t = 60 s (qualification); VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production) 5000 VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
(2) ISOW14x2 is suitable for safe electrical insulation and ISOW14x2B is suitable for basic electrical insulation only within the safety ratings.. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
(4) Apparent charge is electrical discharge caused by a partial discharge (pd).
(5) All pins on each side of the barrier tied together creating a two-terminal device