SLLSFG1B February   2020  – December 2020 ISOW7841A-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description Continued
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—5-V Input, 5-V Output
    10. 7.10 Supply Current Characteristics—5-V Input, 5-V Output
    11. 7.11 Electrical Characteristics—3.3-V Input, 5-V Output
    12. 7.12 Supply Current Characteristics—3.3-V Input, 5-V Output
    13. 7.13 Electrical Characteristics—5-V Input, 3.3-V Output
    14. 7.14 Supply Current Characteristics—5-V Input, 3.3-V Output
    15. 7.15 Electrical Characteristics—3.3-V Input, 3.3-V Output
    16. 7.16 Supply Current Characteristics—3.3-V Input, 3.3-V Output
    17. 7.17 Switching Characteristics—5-V Input, 5-V Output
    18. 7.18 Switching Characteristics—3.3-V Input, 5-V Output
    19. 7.19 Switching Characteristics—5-V Input, 3.3-V Output
    20. 7.20 Switching Characteristics—3.3-V Input, 3.3-V Output
    21. 7.21 Insulation Characteristics Curves
    22. 7.22 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Current Limit, Thermal Overload Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
        1. 10.2.3.1 Insulation Lifetime
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics—5-V Input, 3.3-V Output

VCC = 5 V ±10%, SEL shorted to GND2 (over recommended operating conditions, unless otherwise specified)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VISO Isolated supply voltage External IISO = 0 to 50 mA 3.13 3.34 3.56 V
External IISO = 0 to 130 mA 3 3.34 3.56
VISO(LINE) DC line regulation IISO = 50 mA, VCC = 4.5 V to 5.5 V 2 mV/V
VISO(LOAD) DC load regulation IISO = 10 to 130 mA 1%
EFF Efficiency at maximum load current IISO = 130 mA, CLOAD = 0.1 µF || 10 µF;
VI = VSI (ISOW7841A-Q1); VI = 0 V (ISOW7841A-Q1 with F suffix)
48%
VCC+(UVLO) Positive-going UVLO threshold on VCC, VISO 2.7 V
VCC–(UVLO) Negative-going UVLO threshold on VCC, VISO 2.1 V
VHYS (UVLO) UVLO threshold hysteresis on VCC, VISO 0.2 V
VITH Input pin rising threshold 0.7 VSI
VITL Input pin falling threshold 0.3 VSI
VI(HYS) Input pin threshold hysteresis (INx) 0.1 VSI
IIL Low level input current VIL = 0 at INx or SEL –10 µA
IIH High level input current VIH = VSI(1) at INx or SEL 10 µA
VOH High level output voltage IO = –2 mA, see Figure 8-1 VSO(1) – 0.3 VSO – 0.1 V
VOL Low level output voltage IO = 2 mA, see Figure 8-1 0.1 0.3 V
CMTI Common mode transient immunity VI = VSI or 0 V, VCM = 1000 V; see Figure 8-2 100 kV/us
ICC_SC DC current from supply under short circuit on VISO VISO shorted to GND2 137 mA
VISO(RIP) Output ripple on isolated supply (pk-pk) 20-MHz bandwidth, CLOAD = 0.1 µF || 20 µF, IISO = 130 mA 100 mV
VSI = input side supply; VSO = output side supply