SNOSCZ6
April 2016
LDC1312-Q1
,
LDC1314-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description Continued
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Characteristics
7.7
Switching Characteristics - I2C
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Clocking Architecture
8.3.2
Multi-Channel and Single Channel Operation
8.3.3
Current Drive Control Registers
8.3.4
Device Status Registers
8.3.5
Input Deglitch Filter
8.4
Device Functional Modes
8.4.1
Startup Mode
8.4.2
Normal (Conversion) Mode
8.4.3
Sleep Mode
8.4.4
Shutdown Mode
8.4.4.1
Reset
8.5
Programming
8.5.1
I2C Interface Specifications
8.6
Register Maps
8.6.1
Register List
8.6.2
Address 0x00, DATA_CH0
8.6.3
Address 0x02, DATA_CH1
8.6.4
Address 0x04, DATA_CH2 (LDC1314 only)
8.6.5
Address 0x06, DATA_CH3 (LDC1314 only)
8.6.6
Address 0x08, RCOUNT_CH0
8.6.7
Address 0x09, RCOUNT_CH1
8.6.8
Address 0x0A, RCOUNT_CH2 (LDC1314 only)
8.6.9
Address 0x0B, RCOUNT_CH3 (LDC1314 only)
8.6.10
Address 0x0C, OFFSET_CH0
8.6.11
Address 0x0D, OFFSET_CH1
8.6.12
Address 0x0E, OFFSET_CH2 (LDC1314 only)
8.6.13
Address 0x0F, OFFSET_CH3 (LDC1314 only)
8.6.14
Address 0x10, SETTLECOUNT_CH0
8.6.15
Address 0x11, SETTLECOUNT_CH1
8.6.16
Address 0x12, SETTLECOUNT_CH2 (LDC1314 only)
8.6.17
Address 0x13, SETTLECOUNT_CH3 (LDC1314 only)
8.6.18
Address 0x14, CLOCK_DIVIDERS_CH0
8.6.19
Address 0x15, CLOCK_DIVIDERS_CH1
8.6.20
Address 0x16, CLOCK_DIVIDERS_CH2 (LDC1314 only)
8.6.21
Address 0x17, CLOCK_DIVIDERS_CH3 (LDC1314 only)
8.6.22
Address 0x18, STATUS
8.6.23
Address 0x19, ERROR_CONFIG
8.6.24
Address 0x1A, CONFIG
8.6.25
Address 0x1B, MUX_CONFIG
8.6.26
Address 0x1C, RESET_DEV
8.6.27
Address 0x1E, DRIVE_CURRENT_CH0
8.6.28
Address 0x1F, DRIVE_CURRENT_CH1
8.6.29
Address 0x20, DRIVE_CURRENT_CH2 (LDC1314 only)
8.6.30
Address 0x21, DRIVE_CURRENT_CH3 (LDC1314 only)
8.6.31
Address 0x7E, MANUFACTURER_ID
8.6.32
Address 0x7F, DEVICE_ID
9
Application and Implementation
9.1
Application Information
9.1.1
Theory of Operation
9.1.1.1
Conductive Objects in an EM Field
9.1.1.2
L-C Resonators
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Recommended Initial Register Configuration Values
9.2.2.2
Inductor Self-Resonant Frequency
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Community Resources
12.4
Related Links
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGH|16
MPQF182B
Thermal pad, mechanical data (Package|Pins)
RGH|16
QFND440A
Orderable Information
snoscz6_oa
snoscz6_pm
4 Revision History
DATE
REVISION
NOTES
April 2016
*
Initial release.