SNVS729F September   2011  – August 2014 LM10506

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  General Electrical Characteristics
    6. 7.6  Buck 1 Electrical Characteristics
    7. 7.7  Buck 2 Electrical Characteristics
    8. 7.8  Buck 3 Electrical Characteristics
    9. 7.9  LDO Electrical Characteristics
    10. 7.10 Comparators Electrical Characteristics
    11. 7.11 Typical Characteristics
  8. Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1 Buck Regulators Operation
        1. 8.2.1.1 Buck Regulators Description
        2. 8.2.1.2 PWM Operation
        3. 8.2.1.3 PFM Operation (Bucks 1, 2 & 3)
        4. 8.2.1.4 Soft Start
        5. 8.2.1.5 Current Limiting
        6. 8.2.1.6 Internal Synchronous Rectification
        7. 8.2.1.7 Bypass FET Operation On Bucks 1 And 2
        8. 8.2.1.8 Low Dropout Operation
        9. 8.2.1.9 Out of Regulation
    3. 8.3 Device Functional Modes
      1. 8.3.1  Start-Up Sequence
      2. 8.3.2  Power-On Default And Device Enable
      3. 8.3.3  RESET Pin Function
      4. 8.3.4  Standby Function
        1. 8.3.4.1 STANDBY Pin
        2. 8.3.4.2 Standby Programming Via SPI
        3. 8.3.4.3 Standby Mode, Operational Constraints
      5. 8.3.5  HL_B2, HL_B3 Function
      6. 8.3.6  Undervoltage Lockout (UVLO)
      7. 8.3.7  Overvoltage Lockout (OVLO)
      8. 8.3.8  Interrupt Enable/Interrupt Status
      9. 8.3.9  Thermal Shutdown (TSD)
      10. 8.3.10 Comparator
    4. 8.4 Programming
      1. 8.4.1 SPI Data Interface
        1. 8.4.1.1 Registers Configurable via the SPI Interface
          1. 8.4.1.1.1 ADDR 0x07& 0x08: Buck 1 And Buck 2 Voltage Code And VOUT Level Mapping
          2. 8.4.1.1.2 ADDR 0x00 & 0x09: Buck 3 Voltage Code And VOUT Level Mapping
          3. 8.4.1.1.3 ADDR0x0B: Comparator Threshold Mapping
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Voltage
        2. 9.2.2.2 Standby Mode
        3. 9.2.2.3 External Components Selection
          1. 9.2.2.3.1 Output Inductors & Capacitors Selection
          2. 9.2.2.3.2 Inductor Selection
            1. 9.2.2.3.2.1 Recommended Method For Inductor Selection:
            2. 9.2.2.3.2.2 Alternate Method For Inductor Selection:
              1. 9.2.2.3.2.2.1 Suggested Inductors and Their Suppliers
            3. 9.2.2.3.2.3 Output And Input Capacitors Characteristics
              1. 9.2.2.3.2.3.1 Output Capacitor Selection
              2. 9.2.2.3.2.3.2 Input Capacitor Selection
        4. 9.2.2.4 Recommendations For Unused Functions And Pins
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Layout Considerations
      2. 11.1.2 PCB Layout Thermal Dissipation For DSBGA Package
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.