SNVS999 Data sheet

SNVS999 May 2014 LM10507

PRODUCTION DATA.

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Mechanical Data (Package|Pins)

YFR|34
- MXBG185

Thermal pad, mechanical data (Package|Pins)

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7 Specifications

7.1 Absolute Maximum Ratings⁽¹⁾⁽²⁾⁽³⁾

	MIN	MAX	UNIT
VIN,	-0.3	6.0	V
VIN_IO, VIN_B1, VIN_B2, VIN_B3, SPI_CS, SPI_DI, SPI_CLK, SPI_DO, ENABLE, RESET, PWR_OK, DEVSLP	-0.3	VIN	V
Junction Temperature (T_J-MAX)		150	°C

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and associated test conditions, see the Electrical Characteristics tables.

(2) Internal thermal shutdown protects device from permanent damage. Thermal shutdown engages at T_J = +140°C and disengages at T_J = +120°C (typ.). Thermal shutdown is ensured by design.

(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

7.2 Handling Ratings

			MIN	MAX	UNIT
T_stg	Storage temperature range		-65	150	°C
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾		1.0	kV

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions⁽¹⁾⁽²⁾

over operating free-air temperature range (unless otherwise noted)

	MIN	MAX	UNIT
VIN_B1, VIN_B2_VIN_B3, VIN	3.0	5.5	V
VIN_IO	1.75	3.63, but less than VIN	V
Junction Temperature (T_J)	-30	125	°C
Ambient Temperature (T_A)	-30	85	°C
Maximum Continuous Power Dissipation (P_D-MAX) ⁽¹⁾		0.9	W

(1) In applications where high power dissipation and/or poor thermal resistance is present the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = +125°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (θ_JA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (θ_JA × P_D-MAX).

(2) The amount of Absolute Maximum power dissipation allowed for the device depends on the ambient temperature and can be calculated using the formula: P = (T_J–T_A)/θ_JA, where T_J is the junction temperature, T_A is the ambient temperature, and θ_JA is the junction-to-ambient thermal resistance. θ_JA is highly application and board-layout dependent. Internal thermal shutdown circuitry protects the device from permanent damage (see General Electrical Characteristics)

7.4 Thermal Information

	THERMAL METRIC			TYP	UNIT
R_θJA	Junction-to-Ambient Thermal Resistance⁽¹⁾			44.5	°C/W

7.5 General Electrical Characteristics⁽¹⁾⁽²⁾⁽⁴⁾

SYMBOL	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_Q(STANDBY)	Quiescent Supply Current	DEVSLP=High Only Buck3 is ON ,PFM mode, no load. ⁽⁵⁾		50	150	µA
UNDER/OVERVOLTAGE LOCK OUT
V_{UVLO_RISING}		LM10507-A⁽⁵⁾	2.5	2.8	2.95	V
V_{UVLO_FALLING}		⁽⁵⁾	2.35	2.5	2.65
V_{OVLO_RISING}		LM10507-A⁽⁵⁾	5.7	5.9
V_{OVLO_FALLING}		LM10507-A⁽⁵⁾	5.6	5.8
DIGITAL INTERFACE
V_IL	Logic input low	SPI_CS, SPI_DI, SPI_CLK, ENABLE, RESET, DEVSLP⁽³⁾⁽⁵⁾			0.3*V_{VIN_IO}	V
V_IH	Logic input high	SPI_CS, SPI_DI, SPI_CLK, ENABLE, RESET, DEVSLP⁽³⁾⁽⁵⁾	0.7*V_{VIN_I0}
V_OL	Logic output low	PWR_OK (at 2mA load), SPI_DO⁽⁵⁾			0.2*V_{VIN_IO}
V_OH	Logic output high	PWR_OK (at 2mA load), SPI_DO⁽⁵⁾	0.8*V_{VIN_IO}
I_IL	Input current, pindriven low	SPI_CS, SPI_DI, SPI_CLK, ENABLE, DEVSLP	−2			µA
I_IL	Input current, pindriven low	RESET	−5			µA
I_IH	Input current, pindriven high	SPI_CS, SPI_DI, SPI_CLK, RESET			2	µA
I_IH	Input current, pindriven high	ENABLE, DEVSLP			5	µA
f_{SPI_MAX}	SPI max frequency	⁽⁵⁾			10	MHz
t_DEVSLP	Minimum pulse width ⁽³⁾			2		µs
t_RESET	Minimum pulse width ⁽³⁾			2		µs
t_ENABLE	Minimum pulse width ⁽³⁾			5
t_COMP	Transition time of PWR_OK output ⁽³⁾			0	1

(1) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.

(3) Specification ensured by design. Not tested during production.

(4) Unless otherwise noted, V_IN = 5.0V where: V_IN = V_{VIN_B1} = V_{VIN_B2} = V_{VIN_B3.}Limits apply for T_J = 25°C unless otherwise noted.

(5) Limits apply over the entire operating junction temperature range of −30°C ≤TA = TJ ≤ +85°C.

7.6 Buck 1 Electrical Characteristics⁽¹⁾⁽²⁾⁽³⁾⁽⁵⁾

SYMBOL	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_Q	DC Bias Current in V_IN	No Load, PFM Mode⁽⁶⁾		15	50	µA
I_OUT-MAX	Continuous maximum load current ⁽⁴⁾⁽¹⁾⁽²⁾	Buck 1 enabled, switching in PWM ⁽⁶⁾	1.6			A
I_PEAK	Peak switching current limit	Buck 1 enabled, switching in PWM⁽⁶⁾	1.9	2.2	2.8	A
η	Efficiency peak, Buck 1	I_OUT = 0.3A, V_VIN = 5.0 V		90%
F_SW	Switching Frequency⁽⁴⁾	⁽⁶⁾	1.75	2	2.3	MHz
C_IN	Input Capacitor ⁽⁴⁾	0mA ≤ I_OUT ≤ I_OUT-MAX		4.7		µF
C_OUT	Output Filter Capacitor ⁽⁴⁾		10	10	100	µF
C_OUT	Output Capacitor ESR ⁽⁴⁾				20	mΩ
L	Output Filter Inductance ⁽⁴⁾			2.2		µH
ΔVOUT	DC Line regulation ⁽⁴⁾	3.3V ≤ V_IN ≤ 5.0V, I_OUT = I_OUT-MAX		0.5		%/V
ΔVOUT	DC Load regulation, PWM ⁽⁴⁾	V_VIN=5 V, 0.1 *I_OUT-MAX≤ I_OUT ≤ I_OUT-MAX		0.3		%/A
I_FB	Feedback pininput bias current	V_FB = 1 V⁽⁶⁾		1.2	5	µA
V_FB	Feedback accuracy	V_FB=1 V⁽⁶⁾	-3%		3%
R_DS-ON-HS	High Side Switch On Resistance	V_IN =5.0 V		135		mΩ
R_DS-ON-HS	High Side Switch On Resistance	V_IN = 2.6 V		215		mΩ
R_DS-ON-LS	Low Side Switch On Resistance	V_VIN=5.0 V⁽⁶⁾		85	190	mΩ
STARTUP
T_{START_NoLoad}	Internal soft-start (turn on time) ⁽⁴⁾	Startup from shutdown, V_OUT = 0V, no load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value		0.1		ms
T_{START_FullLoad}	Internal soft-start (turn on time) ⁽⁴⁾	Startup from shutdown, V_OUT = 0V, Maximum Load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value		0.5		ms

(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.

(3) BUCK normal operation is ensured if V_IN ≥ V_OUT+1.0V.

(4) Specification ensured by design. Not tested during production.

(5) Unless otherwise noted, V_IN = 5.0V where: V_IN = V_{VIN_B1} = V_{VIN_B2} = V_{VIN_B3.}Limits apply for T_J = 25°C unless otherwise noted.

(6) Limits apply over the entire operating junction temperature range of −30°C ≤TA = TJ ≤ +85°C.

7.7 Buck 2 Electrical Characteristics⁽²⁾⁽³⁾⁽⁴⁾⁽⁵⁾

SYMBOL	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_Q	DC Bias Current in V_IN	No Load, PFM Mode⁽⁶⁾		15	50	µA
I_{OUT -MAX}	Continuous maximum load current ⁽¹⁾⁽¹⁾⁽²⁾	Buck 1 enabled, switching in PWM⁽⁶⁾	1			A
I_PEAK	Peak switching current limit	Buck 1 enabled, switching in PWM⁽⁶⁾	1.35	1.6	1.85	A
η	Efficiency peak, Buck 2	I_OUT = 0.3A, V_VIN = 5.0 V		90%
F_SW	Switching Frequency⁽¹⁾	⁽⁶⁾	1.75	2	2.3	MHz
C_IN	Input Capacitor ⁽¹⁾	0mA ≤ I_OUT ≤I_OUT-MAX		4.7		µF
C_OUT	Output Filter Capacitor ⁽¹⁾		10	10	100	µF
C_OUT	Output Capacitor ESR ⁽¹⁾				20	mΩ
L	Output Filter Inductance ⁽¹⁾			2.2		µH
ΔV_OUT	DC Line regulation ⁽¹⁾	3.3 V ≤ V_IN ≤ 5.0 V, I_OUT = I_OUT-MAX		0.5		%/V
ΔV_OUT	DC Load regulation ⁽¹⁾, PWM	VIN = 5 V, 0.1*I_OUT-MAX≤ I_OUT ≤ I_OUTMAX		0.3		%/A
I_FB	Feedback pininput bias current	V_FB = 1.8 V⁽⁶⁾		2.2	5	µA
V_FB	Feedback accuracy	V_FB = 2 V⁽⁶⁾	-3%		-3%
R_DS-ON-HS	High Side Switch On Resistance	V_VIN= 5.0 V		135		mΩ
R_DS-ON-HS	High Side Switch On Resistance	V_IN = 2.6 V		215
R_DS-ON-LS	Low Side Switch On Resistance	V_VIN = 5.0 V⁽⁶⁾		85	190
STARTUP
T_{START_NoLoad}	Internal soft-start (turn on time) ⁽¹⁾	Startup from shutdown, V_OUT = 0V, no load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value		0.1		ms
T_{START_FullLoad}	Internal soft-start (turn on time) ⁽¹⁾	Start up from shutdown, V_OUT =0V, Maximum Load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value		0.5		ms

(1) Specification ensured by design. Not tested during production.

(2) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(3) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.

(4) BUCK normal operation is ensured if V_IN ≥ V_OUT+1.0V.

(5) Unless otherwise noted, V_IN = 5.0V where: V_IN = V_{VIN_B1} = V_{VIN_B2} = V_{VIN_B3.}Limits apply for T_J = 25°C unless otherwise noted.

(6) Limits apply over the entire operating junction temperature range of −30°C ≤TA = TJ ≤ +85°C.

7.8 Buck 3 Electrical Characteristics⁽²⁾⁽³⁾⁽⁴⁾⁽⁵⁾

SYMBOL	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_Q	DC Bias Current in V_IN	No Load, PFM Mode⁽⁶⁾		15	50	µA
I_OUT-MAX	Continuous maximum load current⁽¹⁾⁽¹⁾⁽²⁾	Buck 1 enabled, switching in PWM ⁽⁶⁾	1			A
I_PEAK	Peak switching current limit	Buck 1 enabled, switching in PWM⁽⁶⁾	1.35	1.6	1.85	A
η	Efficiency peak, Buck 3 ⁽¹⁾	I_OUT = 0.3A, V_VIN=5.0 V		90%
F_SW	Switching Frequency⁽¹⁾	⁽⁶⁾	1.75	2	2.3	MHz
C_IN	Input Capacitor ⁽¹⁾	0mA ≤ I_OUT ≤ I_OUT-MAX		4.7		µF
C_OUT	Output Filter Capacitor ⁽¹⁾		10	10	100	µF
C_OUT	Output Capacitor ESR ⁽¹⁾				20	mΩ
L	Output Filter Inductance ⁽¹⁾			2.2		µH
ΔVOUT	DC Line regulation ⁽¹⁾	3.3 V ≤ V_IN ≤ 5.0 V, I_OUT = I_OUT-MAX		0.5		%/V
ΔVOUT	DC Load regulation, PWM ⁽¹⁾	VIN=5 V, 0.1* I_OUT-MAX ≤ I_OUT≥I_OUT-MAX		0.3		%/A
I_FB	Feedback pininput bias current	V_FB = 1.5 V⁽⁶⁾		1.0	5	µA
V_FB	Feedback accuracy	V_FB = 3 V ⁽⁶⁾	-3%		-3%
R_DS-ON-HS	High Side Switch On Resistance	V_VIN=5.0 V		135		mΩ
R_DS-ON-HS	High Side Switch On Resistance	V_IN = 2.6 V		215
R_DS-ON-LS	Low Side Switch On Resistance	V_VIN=5.0 V⁽⁶⁾		85	190
STARTUP
T_{START_NoLoad}	Internal soft-start (turn on time) ⁽¹⁾	Startup from shutdown, V_OUT = 0 V, no load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value		0.1		ms
T_{START_FullLoad}	Internal soft-start (turn on time) ⁽¹⁾	Start up from shutdown, V_OUT=0 V, Maximum Load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value		0.5		ms

(1) Specification ensured by design. Not tested during production.

(3) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.

(4) BUCK normal operation is ensured if V_IN ≥ V_OUT+1.0 V.

(5) Unless otherwise noted, V_IN = 5.0V where: V_IN = V_{VIN_B1} = V_{VIN_B2} = V_{VIN_B3.}Limits apply for T_J = 25°C unless otherwise noted.

(6) Limits apply over the entire operating junction temperature range of −30°C ≤TA = TJ ≤ +85°C.

7.9 LDO Electrical Characteristics⁽¹⁾⁽²⁾⁽⁴⁾

SYMBOL	PARAMETER	TEST CONDITIONS		MIN	TYP	MAX	UNIT
V_OUT	Output Voltage Accuracy	I_OUT = 1mA, V_OUT= 2.5 V⁽⁵⁾		−3%		+3%
I_OUT	Maximum Output Current	⁽⁵⁾		250			mA
I_SC	Short-Circuit Current Limit				0.5		A
V_DO	Dropout Voltage⁽³⁾	I_OUT = 250 mA⁽⁵⁾			200	260	mV
ΔV_OUT	Line Regulation	3.3 V ≤ V_IN ≤ 5.5 V, I_OUT = 1mA			5
ΔV_OUT	Load Regulation	1mA ≤ I_OUT ≤ 250 mA, V_IN = 3.3 V, 5.0 V			5
e_N	Output Noise Voltage ⁽³⁾	10 Hz ≤ f ≤ 100 kHz	V_IN = 5.0 V		10		µV_RMS
e_N	Output Noise Voltage ⁽³⁾	10 Hz ≤ f ≤ 100 kHz	V_IN = 3.3 V		35		µV_RMS
PSRR	Power Supply Rejection Ratio ⁽³⁾	F = 10 kHz, C_OUT = 4.7 µF, I_OUT = 20 mA	V_IN = 5.0 V		65		dB
PSRR	Power Supply Rejection Ratio ⁽³⁾	F = 10 kHz, C_OUT = 4.7 µF, I_OUT = 20 mA	V_IN = 3.3 V		40		dB
t_STARTUP	Startup Time from Shutdown ⁽³⁾	C_OUT = 4.7 µF I_OUT = 250mA	V_IN = 5.0 V		45		µs
t_STARTUP	Startup Time from Shutdown ⁽³⁾	C_OUT = 4.7 µF I_OUT = 250mA	V_IN = 3.3 V		60		µs
T_TRANSIENT	Startup Transient Overshoot ⁽³⁾	C_OUT = 4.7 µF I_OUT = 250mA⁽⁵⁾				30	mV

(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.

(3) Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value.

(4) Unless otherwise noted, V_IN = 5.0V where: V_IN = V_{VIN_B1} = V_{VIN_B2} = V_{VIN_B3.}Limits apply for T_J = 25°C unless otherwise noted.

(5) Limits apply over the entire operating junction temperature range of −30°C ≤TA = TJ ≤ +85°C.

7.10 Typical Characteristics

Figure 1. Start-up from VIN Enable

Figure 3. Start-up Plot

Figure 5. DEVSLP Plot

Figure 2. Power-up Out of DEVSLP

Figure 4. POK Plot

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Mechanical Data (Package|Pins)

Thermal pad, mechanical data (Package|Pins)

Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings(1)(2)(3)

7.2 Handling Ratings

7.3 Recommended Operating Conditions(1)(2)

7.4 Thermal Information

7.5 General Electrical Characteristics(1)(2)(4)

7.6 Buck 1 Electrical Characteristics(1)(2)(3)(5)

7.7 Buck 2 Electrical Characteristics(2)(3)(4)(5)

7.8 Buck 3 Electrical Characteristics(2)(3)(4)(5)

7.9 LDO Electrical Characteristics(1)(2)(4)

7.10 Typical Characteristics

7.1 Absolute Maximum Ratings⁽¹⁾⁽²⁾⁽³⁾

7.3 Recommended Operating Conditions⁽¹⁾⁽²⁾

7.5 General Electrical Characteristics⁽¹⁾⁽²⁾⁽⁴⁾

7.6 Buck 1 Electrical Characteristics⁽¹⁾⁽²⁾⁽³⁾⁽⁵⁾

7.7 Buck 2 Electrical Characteristics⁽²⁾⁽³⁾⁽⁴⁾⁽⁵⁾

7.8 Buck 3 Electrical Characteristics⁽²⁾⁽³⁾⁽⁴⁾⁽⁵⁾

7.9 LDO Electrical Characteristics⁽¹⁾⁽²⁾⁽⁴⁾