SNVSC12 April   2021 LM117QML-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: 0.5–A IOUT Devices (LM117H, LM117GW)
    6. 7.6  Parameter Drift: 0.5–A IOUT Devices (LM117H, LM117GW)
    7. 7.7  Electrical Characteristics: 1.5–A IOUT Devices (LM117K)
    8. 7.8  Parameter Drift: 1.5–A IOUT Devices (LM117K)
    9. 7.9  Quality Conformance Inspection
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Setting Output Voltage
    4. 8.4 External Capacitors
    5. 8.5 Load Regulation
    6. 8.6 Protection Diodes
  9. 9 Application and Implementation
    1. 9.1 Typical Applications
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • K|2
  • NAC|16
  • Y|0
  • NDT|3
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.1 Layout Guidelines

Ensure wide enough traces for those carrying the load current in order to reduce the amount of parasitic trace inductance. Keep the feedback loop from VOUT to ADJ as short as possible. To improve PSRR, a bypass capacitor can be placed at the ADJ pin and must be located as close as possible to the IC. In cases when VIN shorts to ground, an external diode must be placed from VOUT to VIN to divert the surge current from the output capacitor and protect the IC. Similarly, in cases when a large bypass capacitor is placed at the ADJ pin and VOUT shorts to ground, an external diode must be placed from ADJ to VOUT to provide a path for the bypass capacitor to discharge. These diodes must be placed close to the corresponding LM117QML-SP pins to increase their effectiveness.