SNVSC12 April 2021 LM117QML-SP
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
In operation, the LM117 develops a nominal 1.25-V reference voltage, VREF, between the output and adjustment terminal. The reference voltage is expressed across R1 and, since the voltage is constant, a constant current I1 then flows through R2, giving an output voltage found by using Equation 1.
Since the 100-μA current from the adjustment terminal represents an error term, the LM117 was designed to minimize IADJ and make it relatively constant with line and load changes. To do this, all quiescent operating current is returned to the output establishing a minimum load current requirement. If there is insufficient load on the output, the output will rise.
To mitigate the requirement for an added load to sink the required output current, the resistor divider may be selected so that it alone can sink the largest specified output load current of 5 mA. This has the additional benefit of minimizing the IADJ error term (which varies over temperature).