SNVSCB6B February   2023  – September 2023 LM2005

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-Up and UVLO
      2. 7.3.2 Input Stages
      3. 7.3.3 Level Shift
      4. 7.3.4 Output Stages
      5. 7.3.5 SH Transient Voltages Below Ground
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and GVDD Capacitor
        2. 8.2.2.2 Select External Gate Driver Resistor
        3. 8.2.2.3 Estimate the Driver Power Loss
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.2 Select External Gate Driver Resistor

The external gate driver resistor, RGATE, is sized to reduce ringing caused by parasitic inductances and capacitances and also to limit the current coming out of the gate driver.

The peak GH pullup current is calculated in Equation 11.

Equation 7. I G H H = V G V D D - V D H R G H H + R G A T E + R G F E T _ I N T

where

  • IGHH = GH Peak pullup current
  • VDH = Bootstrap diode forward voltage drop
  • RGHH = Gate driver internal GH pullup resistance, estimated from the testing conditions, that is RGHH = VGH_H / IGH
  • RGATE = External gate drive resistance
  • RGFET_INT = MOSFET internal gate resistance, provided by transistor data sheet

Similarly, the peak GH pulldown current is shown in Equation 12.

Equation 8. I G H L = V G V D D - V D H R G H L + R G A T E + R G F E T _ I N T

where

  • RGHL is the GH pulldown resistance

The peak GL pullup current is shown in Equation 13.

Equation 9. I G L H = V G V D D R G L H + R G A T E + R G F E T _ I N T

where

  • RGLH is the GL pullup resistance

The peak GL pulldown current is shown in Equation 14.

Equation 10. I G L L = V G V D D R G L L + R G A T E + R G F E T _ I N T

where

  • RGLL is the GL pulldown resistance

For some scenarios, if the applications require fast turnoff, an anti-paralleled diode on RGate could be used to bypass the external gate drive resistor and speed up turnoff transition.