SNVSCH8A September   2023  – October 2023 LM2104

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-Up and UVLO
      2. 7.3.2 Input Stages
      3. 7.3.3 Level Shift
      4. 7.3.4 Output Stages
      5. 7.3.5 SH Transient Voltages Below Ground
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and GVDD Capacitor
        2. 8.2.2.2 Select External Gate Driver Resistor
        3. 8.2.2.3 Estimate the Driver Power Loss
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

VGVDD = VBST = 12 V, GND = VSH = 0 V, No Load on GL or GH, TJ = 25°C (unless otherwise noted). 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IGVDD GVDD quiescent current VIN = VSD = 0 V 430 μA
IDDO GVDD operating current f = 50 kHz, CLOAD = 0 0.56 mA
IBST Total BST quiescent current VIN = VSD = 0 V, VDD = 12 V 150 uA
IBSTO Total BST operating current f = 50 kHz, CLOAD = 0 0.16 mA
IBSTS BST to GND quiescent current VSH = VBST = 95 V, GVDD = 12 V 33.3 μA
IBSTO BST to GND operating current f = 50 kHz, CLOAD = 0 0.07 mA
INPUT
VHIT_IN Input voltage high threshold -40°C to 125°C 1.45 2 V
VHIT_SD Input voltage high threshold -40°C to 125°C 1.45 2 V
VLIT_IN Input voltage low threshold -40°C to 125°C 0.8 1.3 V
VLIT_SD Input voltage low threshold -40°C to 125°C 0.8 1.3 V
VIHYS_IN Input voltage hysteresis 0.15 V
VIHYS_SD Input voltage hysteresis 0.15 V
RIN_IN Input pulldown resistance VIN = 3 V 200 kΩ
RIN_SD Input pulldown resistance VSD = 3 V 200 kΩ
UNDERVOLTAGE PROTECTION (UVLO)
VGVDDR GVDD rising threshold VGVDDR = VGVDD - GND, -40°C to 125°C 8.15 8.75 V
VGVDDF GVDD falling threshold VGVDDF = VGVDD - GND, -40°C to 125°C 6.75 7.7 V
VGVDDHYS GVDD threshold hysteresis 0.45 V
VBSTR VBST rising threshold VBSTR = VBST - VSH, -40°C to 125°C 7.6 8.5 V
VBSTF VBST falling threshold VBSTF = VBST - VSH, -40°C to 125°C 6.25 7.15 V
VBSTHYS VBST threshold hysteresis 0.45 V
LO GATE DRIVER
VGL_L Low level output voltage IGL = 100 mA, VGL_L = VGL – GND 0.25 V
VGL_H High level output voltage IGL = -100 mA, VGL_H = VGVDD – VGL 0.8 V
Peak pullup current(1) VGL = 0V 0.5 A
Peak pulldown current(1) VGL = 12V 0.8 A
HO GATE DRIVER
VGH_L Low level output voltage IGH = 100 mA, VGH_L = VGH – VSH 0.25 V
VGH_H High level output voltage IGH = –100 mA, VGH_H = VBST – VGH 0.8 V
Peak pullup current(1) VGH = 0V 0.5 A
Peak pulldown current(1) VGH = 12V 0.8 A
Parameter not tested in production.