SNVSCB0C
January 2023 – September 2023
LM2105
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Timing Diagrams
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Start-Up and UVLO
7.3.2
Input Stages
7.3.3
Level Shift
7.3.4
Output Stages
7.3.5
SH Transient Voltages Below Ground
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Select Bootstrap and GVDD Capacitor
8.2.2.2
Select External Gate Driver Resistor
8.2.2.3
Estimate the Driver Power Loss
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
DSG|8
MPDS308C
Thermal pad, mechanical data (Package|Pins)
DSG|8
QFND141I
Orderable Information
snvscb0c_oa
snvscb0c_pm
7.2
Functional Block Diagram