SNVS671F February   2011  – May 2019 LM21212-1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Circuit
  4. 4 Revision History
  5. 5 Description
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Performance Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Frequency Synchronization
      2. 8.3.2 Precision Enable
      3. 8.3.3 UVLO
      4. 8.3.4 Current Limit
      5. 8.3.5 Short-Circuit Protection
      6. 8.3.6 Thermal Protection
      7. 8.3.7 Power-Good Flag
      8. 8.3.8 Light Load Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Detailed Design Procedure
        1. 9.2.1.1 Custom Design With WEBENCH® Tools
        2. 9.2.1.2 Output Voltage
        3. 9.2.1.3 Precision Enable
        4. 9.2.1.4 Soft Start
        5. 9.2.1.5 Inductor Selection
        6. 9.2.1.6 Output Capacitor Selection
        7. 9.2.1.7 Input Capacitor Selection
        8. 9.2.1.8 Control Loop Compensation
      2. 9.2.2 Application Curves
  10. 10Layout
    1. 10.1 Pcb Layout Considerations
    2. 10.2 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With Webench® Tools
    2. 11.2 Receiving Notification Of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, And Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.4 Current Limit

The LM21212-1 has current limit protection to avoid dangerous current levels on the power FETs and inductor. A current limit condition is met when the current through the high side FET exceeds the rising current limit level (ICLR). The control circuitry will respond to this event by turning off the high side FET and turning on the low side FET. This forces a negative voltage on the inductor, thereby causing the inductor current to decrease. The high-side FET will not conduct again until the lower current limit level (ICLF) is sensed on the low side FET. At this point, the device will resume normal switching.

A current limit condition will cause the internal soft-start voltage to ramp downward. After the internal soft-start ramps below the feedback (FB) pin voltage, (nominally 0.6 V), FB begins to ramp downward, as well. This voltage foldback limits the power consumption in the device, thereby protecting the device from continuously supplying power to the load under a condition that does not fall within the device SOA. After the current limit condition is cleared, the internal soft-start voltage ramps up again. Figure 23 shows current limit behavior with VSS, VFB, VOUT and VSW.