SNVS671F February   2011  – May 2019 LM21212-1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application Circuit
  4. Revision History
  5. Description
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Performance Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Frequency Synchronization
      2. 8.3.2 Precision Enable
      3. 8.3.3 UVLO
      4. 8.3.4 Current Limit
      5. 8.3.5 Short-Circuit Protection
      6. 8.3.6 Thermal Protection
      7. 8.3.7 Power-Good Flag
      8. 8.3.8 Light Load Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Detailed Design Procedure
        1. 9.2.1.1 Custom Design With WEBENCH® Tools
        2. 9.2.1.2 Output Voltage
        3. 9.2.1.3 Precision Enable
        4. 9.2.1.4 Soft Start
        5. 9.2.1.5 Inductor Selection
        6. 9.2.1.6 Output Capacitor Selection
        7. 9.2.1.7 Input Capacitor Selection
        8. 9.2.1.8 Control Loop Compensation
      2. 9.2.2 Application Curves
  10. 10Layout
    1. 10.1 Pcb Layout Considerations
    2. 10.2 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With Webench® Tools
    2. 11.2 Receiving Notification Of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, And Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Soft Start

When EN has exceeded 1.35 V, and both PVIN and AVIN have exceeded the UVLO threshold, the LM21212-1 begins charging the output linearly to the voltage level dictated by the feedback resistor network. The LM21212-1 employs a user adjustable soft start circuit to lengthen the charging time of the output set by a capacitor from the soft start pin to ground. After enable exceeds 1.35V, an internal 2 µA current source begins to charge the soft start capacitor. This allows the user to limit inrush currents due to a high output capacitance and not cause an over current condition. Adding a soft-start capacitor can also reduce the stress on the input rail. Larger capacitor values will result in longer start up times. Use tEquation 4 to approximate the size of the soft-start capacitor:

Equation 4. LM21212-1 30119930.gif

where ISSis nominally 2 µA and tSS is the desired startup time. If VIN is higher than the UVLO level and enable is toggled high the soft start sequence will begin. There is a small delay between enable transitioning high and the beginning of the soft start sequence. This delay allows the LM21212-1 to initialize its internal circuitry. Once the output has charged to 90% of the nominal output voltage the power good flag will transition high. This behavior is illustrated in Figure 29.

LM21212-1 30119931.gifFigure 29. Soft Start Timing

As shown above, the size of the capacitor is influenced by the nominal feedback voltage level 0.6V, the soft-start charging current ISS (2 µA), and the desired soft start time. If no soft-start capacitor is used then the LM21212-1 defaults to a minimum startup time of 500 µs. The LM21212-1 will not startup faster than 500 µs. When enable is cycled or the device enters UVLO, the charge developed on the soft-start capacitor is discharged to reset the startup process. This also happens when the device enters short circuit mode from an over-current event.