The LM22675 switching regulator provides all of the functions necessary to implement an efficient high voltage step-down (buck) regulator using a minimum of external components. This easy to use regulator incorporates a 42 V N-channel MOSFET switch capable of providing up to 1 A of load current. Excellent line and load regulation along with high efficiency (> 90%) are featured. Voltage mode control offers short minimum on-time, allowing the widest ratio between input and output voltages. Internal loop compensation means that the user is free from the tedious task of calculating the loop compensation components. Fixed 5 V output and adjustable output voltage options are available. A switching frequency of 500 kHz allows for small external components and good transient response. A precision enable input allows simplification of regulator control and system power sequencing. In shutdown mode the regulator draws only 25 µA (typ). Built in soft-start (500 µs, typ) saves external components. The LM22675 also has built in thermal shutdown, and current limiting to protect against accidental overloads.
The LM22675 is a member of Texas Instruments' SIMPLE SWITCHER® family. The SIMPLE SWITCHER concept provides for an easy to use complete design using a minimum number of external components and the TI WEBENCH design tool. TI's WEBENCH tool includes features such as external component calculation, electrical simulation, thermal simulation, and Build-It boards for easy design-in.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM22675 | HSOP (8) | 4.89 mm x 3.90 mm |
LM22675-Q1 |
Changes from K Revision (March 2013) to L Revision
PIN | TYPE | DESCRIPTION | APPLICATION INFORMATION | |
---|---|---|---|---|
NAME | NO. | |||
BOOT | 1 | I | Bootstrap input | Provides the gate voltage for the high side NFET. |
EN | 5 | I | Enable Input | Used to control regulator start-up and shutdown. See Precision Enable section of data sheet. |
EP | EP | — | Exposed Pad | Connect to ground. Provides thermal connection to PCB. See Application and Implementation. |
FB | 4 | I | Feedback pin | Feedback input to regulator. |
GND | 6 | — | Ground input to regulator; system common | System ground pin. |
NC | 2, 3 | — | Not Connected | Pins are not electrically connected inside the chip. Pins do function as thermal conductor. |
SW | 8 | O | Switch pin | Switching output of regulator |
VIN | 7 | I | Input Voltage | Input supply to regulator |
MIN | MAX | UNIT | |
---|---|---|---|
VIN to GND | 43 | V | |
EN Pin Voltage | –0.5 | 6 | V |
SW to GND (3) | –5 | VIN | V |
BOOT Pin Voltage | VSW + 7 | V | |
FB Pin Voltage | –0.5 | 7 | V |
Power Dissipation | Internally Limited | ||
Junction Temperature | 150 | °C | |
For soldering specifications, refer to Application Report Absolute Maximum Ratings for Soldering (SNOA549). |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Tstg | Storage temperature range | –65 | 150 | °C | |
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | –2 | 2 | kV |
MIN | MAX | UNIT | ||||
---|---|---|---|---|---|---|
Tstg | Storage temperature range | –65 | 150 | °C | ||
V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002(1) | –2 | 2 | kV |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN | Supply Voltage | 4.5 | 42 | V |
Junction Temperature Range | –40 | 125 | °C |
THERMAL METRIC(1)(2) | LM22675, LM22675-Q1 | UNIT | |
---|---|---|---|
DDA | |||
8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 60 | °C/W |
PARAMETER | TEST CONDITIONS | MIN(1) | TYP(2) | MAX(1) | UNIT | |
---|---|---|---|---|---|---|
LM22675-5.0 | ||||||
VFB | Feedback Voltage | VIN = 8 V to 42 V | 4.925 | 5.0 | 5.075 | V |
VIN = 8 V to 42 V, –40°C ≤ TJ ≤ 125°C | 4.9 | 5.1 | ||||
LM22675-ADJ | ||||||
VFB | Feedback Voltage | VIN = 4.7 V to 42 V | 1.266 | 1.285 | 1.304 | V |
VIN = 4.7 V to 42 V, –40°C ≤ TJ ≤ 125°C | 1.259 | 1.311 | ||||
ALL OUTPUT VOLTAGE VERSIONS | ||||||
IQ | Quiescent Current | VFB = 5 V | 3.4 | mA | ||
VFB = 5 V, –40°C ≤ TJ ≤ 125°C | 6 | |||||
ISTDBY | Standby Quiescent Current | EN Pin = 0 V | 25 | 40 | µA | |
ICL | Current Limit | 1.3 | 1.5 | 1.7 | A | |
–40°C ≤ TJ ≤ 125°C | 1.2 | 1.8 | ||||
IL | Output Leakage Current | VIN = 42 V, EN Pin = 0 V, VSW = 0 V | 0.2 | 2 | µA | |
VSW = –1 V | 0.1 | 3 | µA | |||
RDS(ON) | Switch On-Resistance | 0.2 | 0.24 | Ω | ||
–40°C ≤ TJ ≤ 125°C | 0.32 | |||||
fO | Oscillator Frequency | 500 | kHz | |||
–40°C ≤ TJ ≤ 125°C | 400 | 600 | ||||
TOFFMIN | Minimum Off-time | 200 | ns | |||
–40°C ≤ TJ ≤ 125°C | 100 | 300 | ||||
TONMIN | Minimum On-time | 100 | ns | |||
IBIAS | Feedback Bias Current | VFB = 1.3 V (ADJ Version Only) | 230 | nA | ||
VEN | Enable Threshold Voltage | Falling | 1.6 | V | ||
Falling, –40°C ≤ TJ ≤ 125°C | 1.3 | 1.9 | ||||
VENHYST | Enable Voltage Hysteresis | 0.6 | V | |||
IEN | Enable Input Current | EN Input = 0 V | 6 | µA | ||
TSD | Thermal Shutdown Threshold | 150 | °C |
The LM22675 incorporates a voltage mode constant frequency PWM architecture. In addition, input voltage feedforward is used to stabilize the loop gain against variations in input voltage. This allows the loop compensation to be optimized for transient performance. The power MOSFET, in conjunction with the diode, produce a rectangular waveform at the switch pin, that swings from about zero volts to VIN. The inductor and output capacitor average this waveform to become the regulator output voltage. By adjusting the duty cycle of this waveform, the output voltage can be controlled. The error amplifier compares the output voltage with the internal reference and adjusts the duty cycle to regulate the output at the desired value.
The internal loop compensation of the -ADJ option is optimized for outputs of 5 V and below. If an output voltage of 5 V or greater is required, the -5.0 option can be used with an external voltage divider. The minimum output voltage is equal to the reference voltage, that is, 1.285 V (typ).
The precision enable input (EN) is used to control the regulator. The precision feature allows simple sequencing of multiple power supplies with a resistor divider from another supply. Connecting this pin to ground or to a voltage less than 1.6 V (typ) will turn off the regulator. The current drain from the input supply, in this state, is 25 µA (typ) at an input voltage of 12 V. The EN input has an internal pullup of about 6 µA. Therefore this pin can be left floating or pulled to a voltage greater than 2.2 V (typ) to turn the regulator on. The hysteresis on this input is about 0.6 V (typ) above the 1.6 V (typ) threshold. When driving the enable input, the voltage must never exceed the 6 V absolute maximum specification for this pin.
Although an internal pullup is provided on the EN pin, it is good practice to pull the input high, when this feature is not used, especially in noisy environments. This can most easily be done by connecting a resistor between VIN and the EN pin. The resistor is required, because the internal zener diode, at the EN pin, will conduct for voltages above about 6 V. The current in this zener must be limited to less than 100 µA. A resistor of 470 kΩ will limit the current to a safe value for input voltages as high 42 V. Smaller values of resistor can be used at lower input voltages.
The LM22675 device also incorporates an input undervoltage lock-out (UVLO) feature. This prevents the regulator from turning on when the input voltage is not great enough to properly bias the internal circuitry. The rising threshold is 4.3 V (typ) while the falling threshold is 3.9 V (typ). In some cases these thresholds may be too low to provide good system performance. The solution is to use the EN input as an external UVLO to disable the part when the input voltage falls below a lower boundary. This is often used to prevent excessive battery discharge or early turn-on during start-up. This method is also recommended to prevent abnormal device operation in applications where the input voltage falls below the minimum of 4.5 V. Figure 10 shows the connections to implement this method of UVLO. Equation 1 and Equation 2 can be used to determine the correct resistor values.
Where:
Voff is the input voltage where the regulator shuts off.
Von is the voltage where the regulator turns on.
Due to the 6 µA pullup, the current in the divider should be much larger than this. A value of 20 kΩ, for RENB is a good first choice. Also, a zener diode may be needed between the EN pin and ground, in order to comply with the absolute maximum ratings on this pin.
The soft-start feature allows the regulator to gradually reach steady-state operation, thus reducing start-up stresses. The internal soft-start feature brings the output voltage up in about 500 µs. This time is fixed and can not be changed. Soft-start is reset any time the part is shut down or a thermal overload event occurs.
The LM22675 incorporates a floating high-side gate driver to control the power MOSFET. The supply for this driver is the external boot-strap capacitor connected between the BOOT pin and SW. A good quality 10 nF ceramic capacitor must be connected to these pins with short, wide PCB traces. One reason the regulator imposes a minimum off-time is to ensure that this capacitor recharges every switching cycle. A minimum load of about 5 mA is required to fully recharge the boot-strap capacitor in the minimum off-time. Some of this load can be provided by the output voltage divider, if used.
The LM22675 has internal loop compensation designed to provide a stable regulator over a wide range of external power stage components.
The internal compensation of the -ADJ option is optimized for output voltages below 5 V. If an output voltage of
5 V or greater is needed, the -5.0 option with an external resistor divider can be used.
Ensuring stability of a design with a specific power stage (inductor and output capacitor) can be tricky. The LM22675 stability can be verified using the WEBENCH Designer online circuit simulation tool. A quick start spreadsheet can also be downloaded from the online product folder.
The complete transfer function for the regulator loop is found by combining the compensation and power stage transfer functions. The LM22675 has internal type III loop compensation, as detailed in Figure 11. This is the approximate "straight line" function from the FB pin to the input of the PWM modulator. The power stage transfer function consists of a dc gain and a second order pole created by the inductor and output capacitor(s). Due to the input voltage feedforward employed in the LM22675, the power stage dc gain is fixed at 20 dB. The second order pole is characterized by its resonant frequency and its quality factor (Q). For a first pass design, the product of inductance and output capacitance should conform to Equation 3.
Alternatively, this pole should be placed between 1.5 kHz and 15 kHz and is given by Equation 4.
The Q factor depends on the parasitic resistance of the power stage components and is not typically in the control of the designer. Of course, loop compensation is only one consideration when selecting power stage components; see Application and Implementation for more details.
In general, hand calculations or simulations can only aid in selecting good power stage components. Good design practice dictates that load and line transient testing should be done to verify the stability of the application. Also, Bode plot measurements should be made to determine stability margins. AN-1889 How to Measure the Loop Transfer Function of Power Supplies (SNVA364) shows how to perform a loop transfer function measurement with only an oscilloscope and function generator.
The LM22675 has current limiting to prevent the switch current from exceeding safe values during an accidental overload on the output. This peak current limit is found in the Electrical Characteristics table under the heading of ICL. The maximum load current that can be provided, before current limit is reached, is determined from Equation 5.
Where:
L is the value of the power inductor.
When the LM22675 enters current limit, the output voltage will drop and the peak inductor current will be fixed at ICL at the end of each cycle. The switching frequency will remain constant while the duty cycle drops. The load current will not remain constant, but will depend on the severity of the overload and the output voltage.
For very severe overloads ("short-circuit"), the regulator changes to a low frequency current foldback mode of operation. The frequency foldback is about 1/5 of the nominal switching frequency. This will occur when the current limit trips before the minimum on-time has elapsed. This mode of operation is used to prevent inductor current "run-away", and is associated with very low output voltages when in overload. Equation 6 can be used to determine what level of output voltage will cause the part to change to low frequency current foldback.
Where:
Fsw is the normal switching frequency.
Vin is the maximum for the application.
If the overload drives the output voltage to less than or equal to Vx, the part will enter current foldback mode. If a given application can drive the output voltage to ≤Vx, during an overload, then a second criterion must be checked. Equation 7 gives the maximum input voltage, when in this mode, before damage occurs.
Where:
Vsc is the value of output voltage during the overload.
fsw is the normal switching frequency.
NOTE
If the input voltage should exceed this value, while in foldback mode, the regulator and/or the diode may be damaged.
It is important to note that the voltages in these equations are measured at the inductor. Normal trace and wiring resistance will cause the voltage at the inductor to be higher than that at a remote load. Therefore, even if the load is shorted with zero volts across its terminals, the inductor will still see a finite voltage. It is this value that should be used for Vx and Vsc in the calculations. In order to return from foldback mode, the load must be reduced to a value much lower than that required to initiate foldback. This load "hysteresis" is a normal aspect of any type of current limit foldback associated with voltage regulators.
The safe operating area, when in short circuit mode, is shown in Figure 12. Operating points below and to the right of the curve represent safe operation.
Internal thermal shutdown circuitry protects the LM22675 should the maximum junction temperature be exceeded. This protection is activated at about 150°C, with the result that the regulator will shutdown until the temperature drops below about 135°C.
Ideally the regulator would control the duty cycle over the full range of zero to one. However due to inherent delays in the circuitry, there are limits on both the maximum and minimum duty cycles that can be reliably controlled. This in turn places limits on the maximum and minimum input and output voltages that can be converted by the LM22675. A minimum on-time is imposed by the regulator in order to correctly measure the switch current during a current limit event. A minimum off-time is imposed in order the re-charge the bootstrap capacitor. Equation 8 can be used to determine the approximate maximum input voltage for a given output voltage.
Where:
Fsw is the switching frequency.
TON is the minimum on-time.
Both parameters are found in the Electrical Characteristics table.
The worst case occurs at the lowest output voltage. If the input voltage, found in Equation 8, is exceeded, the regulator will skip cycles; thus, effectively lowering the switching frequency. The consequences of this are higher output voltage ripple and a degradation of the output voltage accuracy.
The second limitation is the maximum duty cycle before the output voltage will "dropout" of regulation. Equation 9 can be used to approximate the minimum input voltage before dropout occurs.
Where:
The values of TOFF and RDS(ON) are found in the Electrical Characteristics table.
The worst case here occurs at the highest load. In this equation, RL is the dc inductor resistance. Of course, the lowest input voltage to the regulator must not be less than 4.5 V (typ).
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LM22675 device is a step down dc-to-dc regulator. It is typically used to convert a higher dc voltage to a lower dc voltage with a maximum output current of 1 A. Detailed Design Procedure can be used to select components for the LM22675 device. Alternately, the WEBENCH® software may be used to generate complete designs. When generating a design, the WEBENCH® software utilizes iterative design procedure and accesses comprehensive databases of components. Go to WEBENCH Designer for more details. This section presents a simplified discussion of the design process.
For output voltages between about 1.285 V and 5 V, the -ADJ option should be used, with an appropriate voltage divider as shown in Figure 13. Equation 10 can be used to calculate the resistor values of this divider.
A good value for RFBB is 1 kΩ. This will help to provide some of the minimum load current requirement and reduce susceptibility to noise pick-up. The top of RFBT should be connected directly to the output capacitor or to the load for remote sensing. If the divider is connected to the load, a local high-frequency bypass should be provided at that location.
For output voltages of 5 V, the -5.0 option should be used. In this case no divider is needed and the FB pin is connected to the output. The approximate values of the internal voltage divider are as follows: 7.38 kΩ from the FB pin to the input of the error amplifier and 2.55 kΩ from there to ground.
Both the -ADJ and -5.0 options can be used for output voltages greater than 5 V, by using the correct output divider. As mentioned in Internal Loop Compensation, the -5.0 option is optimized for output voltages of 5 V. However, for output voltages greater than 5 V, this option may provide better loop bandwidth than the -ADJ option, in some applications. If the -5.0 option is to be used at output voltages greater than 5 V, Equation 11 should be used to determine the resistor values in the output divider.
A value of RFBB of about 1 kΩ is a good first choice.
A maximum value of 10 kΩ is recommended for the sum of RFBB and RFBT to maintain good output voltage accuracy for the -ADJ option. A maximum of 2 kΩ is recommended for the -5.0 option. For the -5.0 option, the total internal divider resistance is typically 9.93 kΩ.
In all cases the output voltage divider should be placed as close as possible to the FB pin of the LM22675, because this is a high impedance input and is susceptible to noise pick-up.
A Schottky-type power diode is required for all LM22675 applications. Ultra-fast diodes are not recommended and may result in damage to the IC due to reverse recovery current transients. The near ideal reverse recovery characteristics and low forward voltage drop of Schottky diodes are particularly important for high input voltage and low output voltage applications common to the LM22675. The reverse breakdown rating of the diode should be selected for the maximum VIN, plus some safety margin. A good rule of thumb is to select a diode with a reverse voltage rating of 1.3 times the maximum input voltage.
Select a diode with an average current rating at least equal to the maximum load current that will be seen in the application.
Figure 14 shows an example of converting an input voltage range of 5.5 V to 42 V, to an output of 3.3 V at 1 A.
DESIGN PARAMETERS | EXAMPLE VALUE |
---|---|
Driver Supply Voltage (VIN) | 4.5 to 42 V |
Output Voltage (VOUT) | 3.3 V |
RFBT | Calculated based on RFBB and VREF of 1.285 V. |
RFBB | 1 kΩ to 10 kΩ |
IOUT | 1 A |
The following guidelines should be used when designing a step-down (buck) converter with the LM22675.
The inductor value is determined based on the load current, ripple current, and the minimum and maximum input voltages. To keep the application in continuous conduction mode (CCM), the maximum ripple current, IRIPPLE, should be less than twice the minimum load current. The general rule of keeping the inductor current peak-to-peak ripple around 30% of the nominal output current is a good compromise between excessive output voltage ripple and excessive component size and cost. Using this value of ripple current, the value of inductor, L, is calculated using Equation 12.
Where:
Fsw is the switching frequency.
Vin should be taken at its maximum value, for the given application.
The formula in Equation 12 provides a guide to select the value of the inductor L; the nearest standard value will then be used in the circuit.
Once the inductor is selected, the actual ripple current can be found from Equation 13.
Increasing the inductance will generally slow down the transient response but reduce the output voltage ripple. Reducing the inductance will generally improve the transient response but increase the output voltage ripple.
The inductor must be rated for the peak current, IPK, in a given application, to prevent saturation. During normal loading conditions, the peak current is equal to the load current plus 1/2 of the inductor ripple current.
During an overload condition, as well as during certain load transients, the controller may trip current limit. In this case the peak inductor current is given by ICL, found in the Electrical Characteristics table. Good design practice requires that the inductor rating be adequate for this overload condition.
NOTE
If the inductor is not rated for the maximum expected current, it can saturate resulting in damage to the LM22675 and/or the power diode.
The input capacitor selection is based on both input voltage ripple and RMS current. Good quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the regulator current during switch on-time. Low ESR ceramic capacitors are preferred. Larger values of input capacitance are desirable to reduce voltage ripple and noise on the input supply. This noise may find its way into other circuitry, sharing the same input supply, unless adequate bypassing is provided. A very approximate formula for determining the input voltage ripple is shown in Equation 14.
Where:
Vri is the peak-to-peak ripple voltage at the switching frequency.
Another concern is the RMS current passing through this capacitor. Equation 15 gives an approximation to this current.
The capacitor must be rated for at least this level of RMS current at the switching frequency.
All ceramic capacitors have large voltage coefficients, in addition to normal tolerances and temperature coefficients. To help mitigate these effects, multiple capacitors can be used in parallel to bring the minimum capacitance up to the desired value. This may also help with RMS current constraints by sharing the current among several capacitors. Many times it is desirable to use an electrolytic capacitor on the input, in parallel with the ceramics. The moderate ESR of this capacitor can help to damp any ringing on the input supply caused by long power leads. This method can also help to reduce voltage spikes that may exceed the maximum input voltage rating of the LM22675.
It is good practice to include a high frequency bypass capacitor as close as possible to the LM22675. This small case size, low ESR, ceramic capacitor should be connected directly to the VIN and GND pins with the shortest possible PCB traces. Values in the range of 0.47 µF to 1 µF are appropriate. This capacitor helps to provide a low impedance supply to sensitive internal circuitry. It also helps to suppress any fast noise spikes on the input supply that may lead to increased EMI.
The output capacitor is responsible for filtering the output voltage and supplying load current during transients. Capacitor selection depends on application conditions as well as ripple and transient requirements. Best performance is achieved with a parallel combination of ceramic capacitors and a low ESR SP™ or POSCAP™ type. Very low ESR capacitors such as ceramics reduce the output ripple and noise spikes, while higher value electrolytics or polymer provide large bulk capacitance to supply transients. Assuming very low ESR, Equation 16 gives an approximation to the output voltage ripple.
Typically, a total value of 100 µF, or greater, is recommended for output capacitance.
In applications with Vout less than 3.3 V, it is critical that low ESR output capacitors are selected. This will limit potential output voltage overshoots as the input voltage falls below the device normal operating range.
The bootstrap capacitor between the BOOT pin and the SW pin supplies the gate current to turn on the N-channel MOSFET. The recommended value of this capacitor is 10 nF and should be a good quality, low ESR ceramic capacitor. In some cases it may be desirable to slow down the turn-on of the internal power MOSFET, in order to reduce EMI. This can be done by placing a small resistor in series with the Cboot capacitor. Resistors in the range of 10 Ω to 50 Ω can be used. This technique should only be used when absolutely necessary, because it will increase switching losses and thereby reduce efficiency.