SNVS419E December   2005  – May 2016 LM25010 , LM25010-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM25010
    3. 6.3 ESD Ratings: LM25010-Q1, LM25010-Q0
    4. 6.4 Recommended Operating Ratings
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Circuit Overview
      2. 7.3.2 Start-Up Regulator (VCC)
      3. 7.3.3 Regulation Comparator
      4. 7.3.4 Overvoltage Comparator
      5. 7.3.5 ON-Time Control
      6. 7.3.6 Current Limit
      7. 7.3.7 Soft Start
      8. 7.3.8 N-Channel Buck Switch and Driver
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection
          1. 8.2.2.1.1  R1 and R2
          2. 8.2.2.1.2  RON, FS
          3. 8.2.2.1.3  L1
          4. 8.2.2.1.4  RCL
          5. 8.2.2.1.5  C2 and R3
          6. 8.2.2.1.6  D1
          7. 8.2.2.1.7  C1
          8. 8.2.2.1.8  C3
          9. 8.2.2.1.9  C4
          10. 8.2.2.1.10 C5
          11. 8.2.2.1.11 C6
        2. 8.2.2.2 Increasing The Current Limit Threshold
        3. 8.2.2.3 Ripple Configurations
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

The LM25010 regulation, overvoltage, and current limit comparators are very fast, and respond to short duration noise pulses. Therefore, layout considerations are critical for optimum performance. The layout must be as neat and compact as possible, and all the components must be as close as possible to their associated pins. The two major current loops have currents which switch very fast, and so the loops should be as small as possible to minimize conducted and radiated EMI. The first loop is that formed by C1 (CIN), through the VIN to SW pins, L1 (LIND), C2 (COUT), and back to C1. The second loop is that formed by D1, L1, C2, and the SGND and ISEN pins. The ground connection from C2 to C1 should be as short and direct as possible, preferably without going through vias. Directly connect the SGND and RTN pin to each other, and they should be connected as directly as possible to the C1/C2 ground line without going through vias. The power dissipation within the IC can be approximated by determining the total conversion loss (PIN – POUT), and then subtracting the power losses in the free-wheeling diode and the inductor. The power loss in the diode is approximately Equation 29.

Equation 29. PD1 = IO × VF × (1 – D)

where IO is the load current, VF is the diode’s forward voltage drop, and D is the duty cycle. The power loss in the inductor is approximately Equation 30.

Equation 30. PL1 = IO2 × RL × 1.1

where

  • RL is the inductor’s DC resistance
  • the 1.1 factor is an approximation for the AC losses

If it is expected that the internal dissipation of the LM25010 will produce high junction temperatures during normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The exposed pad on the IC package bottom should be soldered to a ground plane, and that plane should both extend from beneath the IC, and be connected to exposed ground plane on the board’s other side using as many vias as possible. The exposed pad is internally connected to the IC substrate. The use of wide PC board traces at the pins, where possible, can help conduct heat away from the IC. The four NC pins on the HTSSOP package are not electrically connected to any part of the IC, and may be connected to ground plane to help dissipate heat from the package. Judicious positioning of the PC board within the end product, along with the use of any available air flow (forced or natural convection) can help reduce the junction temperature.

10.2 Layout Example

LM25010 LM25010-Q1 LM25010_LayoutEx.gif Figure 18. LM25010 Buck Layout Example With the WSON Package