SNVS509F April   2007  – November 2023 LM25116

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High-Voltage Start-Up Regulator
      2. 6.3.2 Enable
      3. 6.3.3 UVLO
      4. 6.3.4 Oscillator and Sync Capability
      5. 6.3.5 Error Amplifier and PWM Comparator
      6. 6.3.6 Ramp Generator
      7. 6.3.7 Current Limit
      8. 6.3.8 HO Output
      9. 6.3.9 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Soft Start and Diode Emulation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Timing Resistor
        2. 7.2.2.2  Output Inductor
        3. 7.2.2.3  Current Sense Resistor
        4. 7.2.2.4  Ramp Capacitor
        5. 7.2.2.5  Output Capacitors
        6. 7.2.2.6  Input Capacitors
        7. 7.2.2.7  VCC Capacitor
        8. 7.2.2.8  Bootstrap Capacitor
        9. 7.2.2.9  Soft Start Capacitor
        10. 7.2.2.10 Output Voltage Divider
        11. 7.2.2.11 UVLO Divider
        12. 7.2.2.12 MOSFETs
        13. 7.2.2.13 MOSFET Snubber
        14. 7.2.2.14 Error Amplifier Compensation
        15. 7.2.2.15 Comprehensive Equations
          1. 7.2.2.15.1 Current Sense Resistor and Ramp Capacitor
          2. 7.2.2.15.2 Modulator Transfer Function
          3. 7.2.2.15.3 Error Amplifier Transfer Function
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

The following conditions apply: TJ = 25°C, minimum and maximum limits apply over the junction temperature range of –40°C to 125°C and are provided for reference only, VIN = 24 V, VCC = 7.4 V, VCCX = 0 V, EN = 5 V, RT = 16 kΩ, no load on LO and HO (unless otherwise noted).
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VIN SUPPLY
IBIASVIN operating currentVCCX = 0 V4.66.5mA
IBIASXVIN operating currentVCCX = 5 V11.5mA
ISTDBYVIN shutdown currentEN = 0 V110µA
VCC REGULATOR
VCC(REG)VCC regulation7.17.47.7V
VCC LDO mode turnoff10.6V
VCC regulationVIN = 6 V55.96V
VCC sourcing current limitVCC = 0 V1526mA
VCCX switch thresholdVCCX rising4.34.54.7V
VCCX switch hysteresis0.25V
VCCX switch RDS(ON)ICCX = 10 mA3.86.2Ω
VCCX leakageVCCX = 0 V–200nA
VCCX pulldown resistanceVCCX = 3 V100kΩ
VCC undervoltage thresholdVCC rising4.34.54.7V
VCC undervoltage hysteresis0.2V
HB DC bias currentHB – SW = 15 V125200µA
EN INPUT
VIL maxEN input low threshold0.5V
VIH minEN input high threshold3.3V
EN input bias currentVEN = 3 V–7.5–31µA
EN input bias currentVEN = 0.5 V–101µA
EN input bias currentVEN = 42 V15µA
UVLO THRESHOLDS
UVLO standby thresholdUVLO rising1.171.2151.262V
UVLO threshold hysteresis0.1V
UVLO pullup current sourceUVLO = 0 V5.4µA
UVLO pulldown RDS(ON)80210Ω
SOFT START
SS current sourceSS = 0 V81114µA
SS diode emulation ramp disable thresholdSS rising3V
SS to FB offsetFB = 1.25 V160mV
SS output low voltageSinking 100 µA, UVLO = 0 V45mV
ERROR AMPLIFIER
VREFFB reference voltageMeasured at FB pin, FB = COMP1.1951.2151.231V
FB input bias currentFB = 2 V15500nA
COMP sink and source current3mA
AOLDC gain80dB
fBWUnity gain bandwidth3MHz
PWM COMPARATORS
tHO(OFF)Forced HO off-time320450580ns
tON(min)Minimum HO on-timeVIN = 42 V, CRAMP = 50 pF100ns
OSCILLATOR
fSW1Frequency 1RT = 16 kΩ180200220kHz
fSW2Frequency 2RT = 5 kΩ480535590kHz
RT output voltage1.1911.2151.239V
RT sync positive threshold33.54V
CURRENT LIMIT
VCS(TH)Cycle-by-cycle sense voltage threshold (CSG to CS)VCCX = 0 V, RAMP = 0 V94110126mV
VCS(THX)Cycle-by-cycle sense voltage threshold (CSG to CS)VCCX = 5 V, RAMP = 0 V105122139mV
CS bias currentCS = 42 V–11µA
CS bias currentCS = 0 V90125µA
CSG bias currentCSG = 0 V90125µA
Current limit fault timerRT = 16 kΩ, 200 kHz, 256 clock cycles1.28ms
RAMP GENERATOR
IR1RAMP current 1VIN = 40 V, VOUT=10 V150180220µA
IR2RAMP current 2VIN = 10 V, VOUT = 10 V212835µA
VOUT bias currentVOUT = 36 V200µA
RAMP output low voltageVIN = 40 V, VOUT = 10 V265mV
DIODE EMULATION
SW zero cross threshold–6mV
DEMB output currentDEMB = 0 V, SS = 1.25 V1.62.73.8µA
DEMB output currentDEMB =0 V, SS = 2.8 V283848µA
DEMB output currentDEMB = 0 V, SS = regulated by FB456585µA
LO GATE DRIVER
VOLLLO low-state output voltageILO = 10 mA0.080.17V
VOHLLO high-state output voltageILO = -100 mA, VOHL = VCC – VLO0.25V
LO rise timeC-load = 1000 pF18ns
LO fall timeC-load = 1000 pF12ns
IOHLPeak LO source currentVLO = 0 V1.8A
IOLLPeak LO sink currentVLO = VCC3.5A
HO GATE DRIVER
VOLHHO low-state output voltageIHO = 100 mA0.170.27V
VOHHHO high-state output voltageIHO = -100 mA, VOHH = VHB – VHO0.45V
HO rise timeC-load = 1000 pF19ns
HO high-side fall timeC-load = 1000 pF13ns
IOHHPeak HO source currentVHO = 0 V1A
IOLHPeak HO sink currentVHO = VCC2.2A
HB to SW undervoltage3V
THERMAL
TSDThermal shutdownRising170°C
Thermal shutdown hysteresis15°C