SNVS509F April   2007  – November 2023 LM25116

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High-Voltage Start-Up Regulator
      2. 6.3.2 Enable
      3. 6.3.3 UVLO
      4. 6.3.4 Oscillator and Sync Capability
      5. 6.3.5 Error Amplifier and PWM Comparator
      6. 6.3.6 Ramp Generator
      7. 6.3.7 Current Limit
      8. 6.3.8 HO Output
      9. 6.3.9 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Soft Start and Diode Emulation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Timing Resistor
        2. 7.2.2.2  Output Inductor
        3. 7.2.2.3  Current Sense Resistor
        4. 7.2.2.4  Ramp Capacitor
        5. 7.2.2.5  Output Capacitors
        6. 7.2.2.6  Input Capacitors
        7. 7.2.2.7  VCC Capacitor
        8. 7.2.2.8  Bootstrap Capacitor
        9. 7.2.2.9  Soft Start Capacitor
        10. 7.2.2.10 Output Voltage Divider
        11. 7.2.2.11 UVLO Divider
        12. 7.2.2.12 MOSFETs
        13. 7.2.2.13 MOSFET Snubber
        14. 7.2.2.14 Error Amplifier Compensation
        15. 7.2.2.15 Comprehensive Equations
          1. 7.2.2.15.1 Current Sense Resistor and Ramp Capacitor
          2. 7.2.2.15.2 Modulator Transfer Function
          3. 7.2.2.15.3 Error Amplifier Transfer Function
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.5 Error Amplifier and PWM Comparator

The internal high-gain error amplifier generates an error signal proportional to the difference between the regulated output voltage and an internal precision reference (1.215 V). The output of the error amplifier is connected to the COMP pin allowing the user to provide loop compensation components, generally a type II network. This network creates a pole at very low frequency, a mid-band zero, and a noise reducing high frequency pole. The PWM comparator compares the emulated current sense signal from the RAMP generator to the error amplifier output voltage at the COMP pin.