SNVSC05
December 2021
LM25148
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Voltage Range (VIN)
8.3.2
High-Voltage Bias Supply Regulator (VCC, VCCX, VDDA)
8.3.3
Precision Enable (EN)
8.3.4
Power-Good Monitor (PG)
8.3.5
Switching Frequency (RT)
8.3.6
Dual Random Spread Spectrum (DRSS)
8.3.7
Soft Start
8.3.8
Output Voltage Setpoint (FB)
8.3.9
Minimum Controllable On Time
8.3.10
Error Amplifier and PWM Comparator (FB, EXTCOMP)
8.3.11
Slope Compensation
8.3.12
Inductor Current Sense (ISNS+, VOUT)
8.3.12.1
Shunt Current Sensing
8.3.12.2
Inductor DCR Current Sensing
8.3.13
Hiccup Mode Current Limiting
8.3.14
High-Side and Low-Side Gate Drivers (HO, LO)
8.3.15
Output Configurations (CNFG)
8.3.16
Single-Output Dual-Phase Operation
8.4
Device Functional Modes
8.4.1
Sleep Mode
8.4.2
Pulse Frequency Modulation and Synchronization (PFM/SYNC)
8.4.3
Thermal Shutdown
9
Application and Implementation
9.1
Application Information
9.1.1
Power Train Components
9.1.1.1
Buck Inductor
9.1.1.2
Output Capacitors
9.1.1.3
Input Capacitors
9.1.1.4
Power MOSFETs
9.1.1.5
EMI Filter
9.1.2
Error Amplifier and Compensation
9.2
Typical Applications
9.2.1
Design 1 – High Efficiency 2.1-MHz Synchronous Buck Regulator
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Custom Design With WEBENCH® Tools
9.2.1.2.2
Custom Design With Excel Quickstart Tool
9.2.1.2.3
Buck Inductor
9.2.1.2.4
Current-Sense Resistance
9.2.1.2.5
Output Capacitors
9.2.1.2.6
Input Capacitors
9.2.1.2.7
Frequency Set Resistor
9.2.1.2.8
Feedback Resistors
9.2.1.2.9
Compensation Components
9.2.1.3
Application Curves
9.2.2
Design 2 – High Efficiency 440-kHz Synchronous Buck Regulator
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curves
9.2.3
Design 3 – Dual-Phase 400-kHz 20-A Synchronous Buck Regulator
9.2.3.1
Design Requirements
9.2.3.2
Detailed Design Procedure
9.2.3.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Power Stage Layout
11.1.2
Gate-Drive Layout
11.1.3
PWM Controller Layout
11.1.4
Thermal Design and Layout
11.1.5
Ground Plane Design
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.1.1.1
Custom Design With WEBENCH® Tools
12.2
Documentation Support
12.2.1
Related Documentation
12.2.1.1
PCB Layout Resources
12.2.1.2
Thermal Design Resources
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGY|24
MPQF143E
Thermal pad, mechanical data (Package|Pins)
RGY|24
QFND678
Orderable Information
snvsc05_oa
snvsc05_pm
7.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002
(2)
±750
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.