A power supply input typically has a relatively
high source impedance at the switching frequency. Good-quality input capacitors are
necessary to limit the input ripple voltage. In general, the ripple current splits between the input capacitors based
on the relative impedance of the capacitors at the switching frequency.
- Select the input capacitors with sufficient voltage and RMS ripple current ratings.
- Use Equation 42 to calculate the input capacitor RMS ripple
current assuming a worst-case duty-cycle operating
point of 50%.
Equation 42. ![GUID-21A22AC2-CFA4-4493-B8B9-FA31B4D24799-low.gif](/ods/images/SNVSBV6B/GUID-21A22AC2-CFA4-4493-B8B9-FA31B4D24799-low.gif)
- Use Equation 43 to find the required input capacitance.
Equation 43. ![GUID-5E1DBB31-B6EF-4DD3-8CA6-761EF8FA35B9-low.gif](/ods/images/SNVSBV6B/GUID-5E1DBB31-B6EF-4DD3-8CA6-761EF8FA35B9-low.gif)
where
- ΔVIN is the input peak-to-peak ripple voltage specification.
- RESR is the input capacitor ESR.
- Recognizing the voltage coefficient of ceramic
capacitors, select two 10-µF, 50-V, X7R, 1210 ceramic input capacitors. Place these
capacitors adjacent to the power MOSFETs. See Power Stage Layout for more detail.
- Use four 10-nF, 50-V, X7R, 0603 ceramic
capacitors near the high-side MOSFET to supply the high di/dt current during MOSFET
switching transitions. Such capacitors offer high self-resonant frequency (SRF) and low
effective impedance above 100 MHz. The result is lower power loop parasitic inductance,
thus minimizing switch-node voltage overshoot and ringing for lower conducted and radiated
EMI signature. Refer to Layout Guidelines for more detail.