Calculate the current-sense resistance based on a
maximum peak current capability of at least 25% higher than the peak inductor
current at full load to provide sufficient margin during start-up and load-on
transients. Calculate the current sense resistances using Equation 37.
Equation 37.
where
VCS-TH is the
60-mV current limit threshold.
Select a standard resistance value of 5 mΩ for
the shunt. An 0508 footprint component with wide aspect ratio termination design
provides 1-W power rating, low parasitic series inductance, and compact PCB
layout. Carefully adhere to the layout guidelines in Section 9.4.1 to make sure that noise and DC errors do not corrupt the differential
current-sense voltages measured at the ISNS+ and VOUT pins.
Place the shunt resistor close to the inductor.
Use Kelvin-sense connections, and route the sense
lines differentially from the shunt to the LM25149-Q1.
The CS-to-output propagation delay (related to
the current limit comparator, internal logic, and power MOSFET gate drivers)
causes the peak current to increase above the calculated current limit
threshold. For a total propagation delay tDELAY-ISNS+ of 40 ns, use
Equation 38 to calculate the worst-case peak inductor current with the output shorted.
Equation 38.
Based on this result, select an inductor with
saturation current greater than 16 A across the full operating temperature
range.