SNVSCT9 October   2024 LM251772

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Buck-Boost Control Scheme
        1. 8.3.1.1 Buck Mode
        2. 8.3.1.2 Boost Mode
        3. 8.3.1.3 Buck-Boost Mode
      2. 8.3.2  Power Save Mode
      3. 8.3.3  Reference System
        1. 8.3.3.1 VIO LDO and nRST-PIN
      4. 8.3.4  Supply Voltage Selection – VSMART Switch and Selection Logic
      5. 8.3.5  Enable and Undervoltage Lockout
        1. 8.3.5.1 UVLO
      6. 8.3.6  Internal VCC Regulators
        1. 8.3.6.1 VCC1 Regulator
        2. 8.3.6.2 VCC2 Regulator
      7. 8.3.7  Error Amplifier and Control
        1. 8.3.7.1 Output Voltage Regulation
        2. 8.3.7.2 Output Voltage Feedback
        3. 8.3.7.3 Voltage Regulation Loop
        4. 8.3.7.4 Dynamic Voltage Scaling
      8. 8.3.8  Output Voltage Discharge
      9. 8.3.9  Peak Current Sensor
      10. 8.3.10 Short Circuit - Hiccup Protection
      11. 8.3.11 Current Monitor/Limiter
        1. 8.3.11.1 Overview
        2. 8.3.11.2 Output Current Limitation
        3. 8.3.11.3 Output Current Monitor
      12. 8.3.12 Oscillator Frequency Selection
      13. 8.3.13 Frequency Synchronization
      14. 8.3.14 Output Voltage Tracking
        1. 8.3.14.1 Analog Voltage Tracking
        2. 8.3.14.2 Digital Voltage Tracking
      15. 8.3.15 Slope Compensation
      16. 8.3.16 Configurable Soft Start
      17. 8.3.17 Drive Pin
      18. 8.3.18 Dual Random Spread Spectrum – DRSS
      19. 8.3.19 Gate Driver
      20. 8.3.20 Cable Drop Compensation (CDC)
      21. 8.3.21 CFG-pin and R2D Interface
      22. 8.3.22 Advanced Monitoring Features
        1. 8.3.22.1  Overview
        2. 8.3.22.2  BUSY
        3. 8.3.22.3  OFF
        4. 8.3.22.4  VOUT
        5. 8.3.22.5  IOUT
        6. 8.3.22.6  INPUT
        7. 8.3.22.7  TEMPERATURE
        8. 8.3.22.8  CML
        9. 8.3.22.9  OTHER
        10. 8.3.22.10 ILIM_OP
        11. 8.3.22.11 nFLT/nINT Pin Output
        12. 8.3.22.12 Status Byte
      23. 8.3.23 Protection Features
        1. 8.3.23.1  Thermal Shutdown (TSD)
        2. 8.3.23.2  Over Current Protection
        3. 8.3.23.3  Output Over Voltage Protection 1 (OVP1)
        4. 8.3.23.4  Output Over Voltage Protection 2 (OVP2)
        5. 8.3.23.5  Input Voltage Protection (IVP)
        6. 8.3.23.6  Input Voltage Regulation (IVR)
        7. 8.3.23.7  Power Good
        8. 8.3.23.8  Boot-Strap Under Voltage Protection
        9. 8.3.23.9  Boot-strap Over Voltage Clamp
        10. 8.3.23.10 CRC - CHECK
    4. 8.4 Device Functional Modes
      1. 8.4.1 Overview
      2. 8.4.2 Logic State Description
    5. 8.5 Programming
      1. 8.5.1 I2C Bus Operation
      2. 8.5.2 Clock Stretching
      3. 8.5.3 Data Transfer Formats
      4. 8.5.4 Single READ from a Defined Register Address
      5. 8.5.5 Sequential READ Starting from a Defined Register Address
      6. 8.5.6 Single WRITE to a Defined Register Address
      7. 8.5.7 Sequential WRITE Starting at a Defined Register Address
  10. LM251772 Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design with WEBENCH Tools
        2. 10.2.2.2  Frequency
        3. 10.2.2.3  Feedback Divider
        4. 10.2.2.4  Inductor and Current Sense Resistor Selection
        5. 10.2.2.5  Output Capacitor
        6. 10.2.2.6  Input Capacitor
        7. 10.2.2.7  Slope Compensation
        8. 10.2.2.8  UVLO Divider
        9. 10.2.2.9  Soft-Start Capacitor
        10. 10.2.2.10 MOSFETs QH1 and QL1
        11. 10.2.2.11 MOSFETs QH2 and QL2
        12. 10.2.2.12 Loop Compensation
        13. 10.2.2.13 External Component Selection
      3. 10.2.3 Application Curves
    3. 10.3 Wireless Charging Supply
    4. 10.4 USB-PD Source with Power Path
    5. 10.5 Parallel (Multiphase) Operation
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

LM251772 Registers

Table 9-1 lists the memory-mapped registers for the LM251772 registers. All register offset addresses not listed in LM251772 Registers should be considered as reserved locations and the register contents should not be modified.

Table 9-1 LM251772 Registers
OffsetAcronymRegister NameSection
3hCLEAR_FAULTSCLEAR_FAULTSSection 9.1
AhILIM_THRESHOLDILIM_THRESHOLDSection 9.2
ChVOUT_TARGET1_LSBVOUT_TARGET1_LSBSection 9.3
DhVOUT_TARGET1_MSBVOUT_TARGET1_MSBSection 9.4
21hUSB_PD_STATUS_0USB_PD_STATUS_0Section 9.5
78hSTATUS_BYTESTATUS_BYTESection 9.6
81hUSB_PD_CONTROL_0USB_PD_CONTROL_0Section 9.7
D0hMFR_SPECIFIC_D0MFR_SPECIFIC_D0Section 9.8
D1hMFR_SPECIFIC_D1MFR_SPECIFIC_D1Section 9.9
D2hMFR_SPECIFIC_D2MFR_SPECIFIC_D2Section 9.10
D5hMFR_SPECIFIC_D5MFR_SPECIFIC_D5Section 9.11
D6hMFR_SPECIFIC_D6MFR_SPECIFIC_D6Section 9.12
D7hMFR_SPECIFIC_D7MFR_SPECIFIC_D7Section 9.13
D8hMFR_SPECIFIC_D8MFR_SPECIFIC_D8Section 9.14
DAhIVP_VOLTAGEIVP_VOLTAGESection 9.15

Complex bit access types are encoded to fit into small table cells. Table 9-2 shows the codes that are used for access types in this section.

Table 9-2 LM251772 Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
Reset or Default Value
-nValue after reset or the default value

9.1 CLEAR_FAULTS Register (Offset = 3h) [Reset = 00h]

CLEAR_FAULTS is shown in Table 9-3.

Return to the Summary Table.

clear all latched status flags

Table 9-3 CLEAR_FAULTS Register Field Descriptions
BitFieldTypeResetDescription
7-0CLEAR_FAULTSR0haccessing the address is enough to clear fault

9.2 ILIM_THRESHOLD Register (Offset = Ah) [Reset = 12h]

ILIM_THRESHOLD is shown in Table 9-4.

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Table 9-4 ILIM_THRESHOLD Register Field Descriptions
BitFieldTypeResetDescription
7-0ILIM_THRESHOLDR/W12hISNS current limit threshold voltage. Value in bracket considers a 10mOhms sens resistor
0h = 5mV (0.5 A)
1h = 5mV (0.5 A)
2h = 5mV (0.5 A)
3h = 5mV (0.5 A)
4h = 5mV (0.5 A)
5h = 5mV (0.5 A)
6h = 5mV (0.5 A)
7h = 5mV (0.5 A)
8h = 5mV (0.5 A)
9h = 5mV (0.5 A)
Ah = 5mV (0.5 A)
Bh = 5.5mV (0.55 A)
Ch = 6mV (0.6 A)
Dh = 6.5mV (0.65 A)
Eh = 7mV (0.7 A)
Fh = 7.5mV (0.75 A)
10h = 8mV (0.8 A)
11h = 8.5mV (0.85 A)
12h = 9mV (0.9 A)
13h = 9.5mV (0.95 A)
14h = 10mV (1 A)
15h = 10.5mV (1.05 A)
16h = 11mV (1.1 A)
17h = 11.5mV (1.15 A)
18h = 12mV (1.2 A)
19h = 12.5mV (1.25 A)
1Ah = 13mV (1.3 A)
1Bh = 13.5mV (1.35 A)
1Ch = 14mV (1.4 A)
1Dh = 14.5mV (1.45 A)
1Eh = 15mV (1.5 A)
1Fh = 15.5mV (1.55 A)
20h = 16mV (1.6 A)
21h = 16.5mV (1.65 A)
22h = 17mV (1.7 A)
23h = 17.5mV (1.75 A)
24h = 18mV (1.8 A)
25h = 18.5mV (1.85 A)
26h = 19mV (1.9 A)
27h = 19.5mV (1.95 A)
28h = 20mV (2 A)
29h = 20.5mV (2.05 A)
2Ah = 21mV (2.1 A)
2Bh = 21.5mV (2.15 A)
2Ch = 22mV (2.2 A)
2Dh = 22.5mV (2.25 A)
2Eh = 23mV (2.3 A)
2Fh = 23.5mV (2.35 A)
30h = 24mV (2.4 A)
31h = 24.5mV (2.45 A)
32h = 25mV (2.5 A)
33h = 25.5mV (2.55 A)
34h = 26mV (2.6 A)
35h = 26.5mV (2.65 A)
36h = 27mV (2.7 A)
37h = 27.5mV (2.75 A)
38h = 28mV (2.8 A)
39h = 28.5mV (2.85 A)
3Ah = 29mV (2.9 A)
3Bh = 29.5mV (2.95 A)
3Ch = 30mV (3 A)
3Dh = 30.5mV (3.05 A)
3Eh = 31mV (3.1 A)
3Fh = 31.5mV (3.15 A)
40h = 32mV (3.2 A)
41h = 32.5mV (3.25 A)
42h = 33mV (3.3 A)
43h = 33.5mV (3.35 A)
44h = 34mV (3.4 A)
45h = 34.5mV (3.45 A)
46h = 35mV (3.5 A)
47h = 35.5mV (3.55 A)
48h = 36mV (3.6 A)
49h = 36.5mV (3.65 A)
4Ah = 37mV (3.7 A)
4Bh = 37.5mV (3.75 A)
4Ch = 38mV (3.8 A)
4Dh = 38.5mV (3.85 A)
4Eh = 39mV (3.9 A)
4Fh = 39.5mV (3.95 A)
50h = 40mV (4 A)
51h = 40.5mV (4.05 A)
52h = 41mV (4.1 A)
53h = 41.5mV (4.15 A)
54h = 42mV (4.2 A)
55h = 42.5mV (4.25 A)
56h = 43mV (4.3 A)
57h = 43.5mV (4.35 A)
58h = 44mV (4.4 A)
59h = 44.5mV (4.45 A)
5Ah = 45mV (4.5 A)
5Bh = 45.5mV (4.55 A)
5Ch = 46mV (4.6 A)
5Dh = 46.5mV (4.65 A)
5Eh = 47mV (4.7 A)
5Fh = 47.5mV (4.75 A)
60h = 48mV (4.8 A)
61h = 48.5mV (4.85 A)
62h = 49mV (4.9 A)
63h = 49.5mV (4.95 A)
64h = 50mV (5 A)
65h = 50.5mV (5.05 A)
66h = 51mV (5.1 A)
67h = 51.5mV (5.15 A)
68h = 52mV (5.2 A)
69h = 52.5mV (5.25 A)
6Ah = 53mV (5.3 A)
6Bh = 53.5mV (5.35 A)
6Ch = 54mV (5.4 A)
6Dh = 54.5mV (5.45 A)
6Eh = 55mV (5.5 A)
6Fh = 55.5mV (5.55 A)
70h = 56mV (5.6 A)
71h = 56.5mV (5.65 A)
72h = 57mV (5.7 A)
73h = 57.5mV (5.75 A)
74h = 58mV (5.8 A)
75h = 58.5mV (5.85 A)
76h = 59mV (5.9 A)
77h = 59.5mV (5.95 A)
78h = 60mV (6 A)
79h = 60.5mV (6.05 A)
7Ah = 61mV (6.1 A)
7Bh = 61.5mV (6.15 A)
7Ch = 62mV (6.2 A)
7Dh = 62.5mV (6.25 A)
7Eh = 63mV (6.3 A)
7Fh = 63.5mV (6.35 A)
80h = 64mV (6.4 A)
81h = 64.5mV (6.45 A)
82h = 65mV (6.5 A)
83h = 65.5mV (6.55 A)
84h = 66mV (6.6 A)
85h = 66.5mV (6.65 A)
86h = 67mV (6.7 A)
87h = 67.5mV (6.75 A)
88h = 68mV (6.8 A)
89h = 68.5mV (6.85 A)
8Ah = 69mV (6.9 A)
8Bh = 69.5mV (6.95 A)
8Ch = 70mV (7 A)
8Dh = 70mV (7 A)
8Eh = 70mV (7 A)
8Fh = 70mV (7 A)
90h = 70mV (7 A)
91h = 70mV (7 A)
92h = 70mV (7 A)
93h = 70mV (7 A)
94h = 70mV (7 A)
95h = 70mV (7 A)
96h = 70mV (7 A)
97h = 70mV (7 A)
98h = 70mV (7 A)
99h = 70mV (7 A)
9Ah = 70mV (7 A)
9Bh = 70mV (7 A)
9Ch = 70mV (7 A)
9Dh = 70mV (7 A)
9Eh = 70mV (7 A)
9Fh = 70mV (7 A)
A0h = 70mV (7 A)
A1h = 70mV (7 A)
A2h = 70mV (7 A)
A3h = 70mV (7 A)
A4h = 70mV (7 A)
A5h = 70mV (7 A)
A6h = 70mV (7 A)
A7h = 70mV (7 A)
A8h = 70mV (7 A)
A9h = 70mV (7 A)
AAh = 70mV (7 A)
ABh = 70mV (7 A)
ACh = 70mV (7 A)
ADh = 70mV (7 A)
AEh = 70mV (7 A)
AFh = 70mV (7 A)
B0h = 70mV (7 A)
B1h = 70mV (7 A)
B2h = 70mV (7 A)
B3h = 70mV (7 A)
B4h = 70mV (7 A)
B5h = 70mV (7 A)
B6h = 70mV (7 A)
B7h = 70mV (7 A)
B8h = 70mV (7 A)
B9h = 70mV (7 A)
BAh = 70mV (7 A)
BBh = 70mV (7 A)
BCh = 70mV (7 A)
BDh = 70mV (7 A)
BEh = 70mV (7 A)
BFh = 70mV (7 A)
C0h = 70mV (7 A)
C1h = 70mV (7 A)
C2h = 70mV (7 A)
C3h = 70mV (7 A)
C4h = 70mV (7 A)
C5h = 70mV (7 A)
C6h = 70mV (7 A)
C7h = 70mV (7 A)
C8h = 70mV (7 A)
C9h = 70mV (7 A)
CAh = 70mV (7 A)
CBh = 70mV (7 A)
CCh = 70mV (7 A)
CDh = 70mV (7 A)
CEh = 70mV (7 A)
CFh = 70mV (7 A)
D0h = 70mV (7 A)
D1h = 70mV (7 A)
D2h = 70mV (7 A)
D3h = 70mV (7 A)
D4h = 70mV (7 A)
D5h = 70mV (7 A)
D6h = 70mV (7 A)
D7h = 70mV (7 A)
D8h = 70mV (7 A)
D9h = 70mV (7 A)
DAh = 70mV (7 A)
DBh = 70mV (7 A)
DCh = 70mV (7 A)
DDh = 70mV (7 A)
DEh = 70mV (7 A)
DFh = 70mV (7 A)
E0h = 70mV (7 A)
E1h = 70mV (7 A)
E2h = 70mV (7 A)
E3h = 70mV (7 A)
E4h = 70mV (7 A)
E5h = 70mV (7 A)
E6h = 70mV (7 A)
E7h = 70mV (7 A)
E8h = 70mV (7 A)
E9h = 70mV (7 A)
EAh = 70mV (7 A)
EBh = 70mV (7 A)
ECh = 70mV (7 A)
EDh = 70mV (7 A)
EEh = 70mV (7 A)
EFh = 70mV (7 A)
F0h = 70mV (7 A)
F1h = 70mV (7 A)
F2h = 70mV (7 A)
F3h = 70mV (7 A)
F4h = 70mV (7 A)
F5h = 70mV (7 A)
F6h = 70mV (7 A)
F7h = 70mV (7 A)
F8h = 70mV (7 A)
F9h = 70mV (7 A)
FAh = 70mV (7 A)
FBh = 70mV (7 A)
FCh = 70mV (7 A)
FDh = 70mV (7 A)
FEh = 70mV (7 A)
FFh = 70mV (7 A)

9.3 VOUT_TARGET1_LSB Register (Offset = Ch) [Reset = FFh]

VOUT_TARGET1_LSB is shown in Table 9-5.

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Table 9-5 VOUT_TARGET1_LSB Register Field Descriptions
BitFieldTypeResetDescription
7-0VOUT_AR/WFFhOutput target Voltage
Logical Register Vout Setting
Lower Limit: 3.3V or 1V depending on SEL__FB_DIV20
Upper Limit: 48V or 24 V depending on SEL__FB_DIV20
Step size: 20mV or 10mV depending on SEL__FB_DIV20
Value Calculation for 20mV
Value Calculation for 10mV

9.4 VOUT_TARGET1_MSB Register (Offset = Dh) [Reset = 00h]

VOUT_TARGET1_MSB is shown in Table 9-6.

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Table 9-6 VOUT_TARGET1_MSB Register Field Descriptions
BitFieldTypeResetDescription
7-4NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
3-0VOUT_AR/W0hOutput target Voltage
Logical Register Vout Setting
Lower Limit: 3.3V or 1V depending on SEL__FB_DIV20
Upper Limit: 48V or 24 V depending on SEL__FB_DIV20
Step size: 20mV or 10mV depending on SEL__FB_DIV20
Value Calculation for 20mV.
Value Calculation for 10mV.

9.5 USB_PD_STATUS_0 Register (Offset = 21h) [Reset = 00h]

USB_PD_STATUS_0 is shown in Table 9-7.

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USB-PD STATUS REGISTER

Table 9-7 USB_PD_STATUS_0 Register Field Descriptions
BitFieldTypeResetDescription
7NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
6CC_OPERATIONR0hInstantanous status for constant current (CC) ILIM operation
5.0 NIL R 0h This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.

9.6 STATUS_BYTE Register (Offset = 78h) [Reset = 00h]

STATUS_BYTE is shown in Table 9-8.

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FAULT STATUS LOW BYTE

Table 9-8 STATUS_BYTE Register Field Descriptions
BitFieldTypeResetDescription
7BUSYR0hunit is busy
0h = unit not busy
1h = unit busy
6OFFR0hdevice not providing VOUT and/or unit is off
0h = unit on
1h = unit off
5VOUTR0hVOUT_OV fault
0h = no fault
1h = fault
4IOUTR0hIOUT_OC fault
0h = no fault
1h = fault
3INPUTR0hVIN_UV fault
0h = no fault
1h = fault
2TEMPERATURER0hTemperature fault or warning
0h = no fault
1h = fault
1CMLR0hComm, Logic, Memory event
0h = no fault
1h = fault
0OTHERR0hother fault or warning
0h = no fault
1h = fault

9.7 USB_PD_CONTROL_0 Register (Offset = 81h) [Reset = 00h]

USB_PD_CONTROL_0 is shown in Table 9-9.

Return to the Summary Table.

USB-PD CONTROL REGISTER

Table 9-9 USB_PD_CONTROL_0 Register Field Descriptions
BitFieldTypeResetDescription
7-2NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
1FORCE_DISCHR/W0hActivates Vo discharge
0h = DISABLE
1h = ENABLE
0CONV_EN2R/W0hEnables the power stage
0h = DISABLE
1h = ENABLE

9.8 MFR_SPECIFIC_D0 Register (Offset = D0h) [Reset = 32h]

MFR_SPECIFIC_D0 is shown in Table 9-10.

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CONFIG_0 Device Configuration Register 0

Table 9-10 MFR_SPECIFIC_D0 Register Field Descriptions
BitFieldTypeResetDescription
7NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
6EN_NEG_CL_LIMITR/W0hEnables ILIM for negative current limit, If disabled ILIM clamps pos I_L
0h = DISABLE
1h = ENABLE
5EN_VCC1R/W1hEnables the VCC1 auxiliary LDO
0h = DISABLE
1h = ENABLE
4IMON_LIMITER_ENR/W1hEnables the Imon in limiter configuration
0h = DISABLE
1h = ENABLE
3HICCUP_ENR/W0hEnables Hiccup short circuit
0h = DISABLE
1h = ENABLE
2DRSS_ENR/W0hEnables Dual Spread Spectrum
0h = DISABLE
1h = ENABLE
1USLEEP_ENR/W1hEnables micro sleep mode
0h = DISABLE
1h = ENABLE
0CONV_ENR/W0hEnables the power stage
0h = DISABLE
1h = ENABLE

9.9 MFR_SPECIFIC_D1 Register (Offset = D1h) [Reset = 19h]

MFR_SPECIFIC_D1 is shown in Table 9-11.

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CONFIG_1 Device Configuration Register 1

Table 9-11 MFR_SPECIFIC_D1 Register Field Descriptions
BitFieldTypeResetDescription
7EN_THER_WARNR/W0hEnables Thermal Warning
0h = DISABLE
1h = ENABLE
6-5THW_THRESHOLDR/W0hSelects the Thermal Warning Threshold
0h = 140degC
1h = 125degC
2h = 110degC
3h = 95degC
4EN_NINTR/W1hConigures the nFLT pin handler to act as interupt pin or nFLT pin
0h = DISABLE
1h = ENABLE
3EN_DTRK_STARTOVERR/W1hEnables a direct start-up if DTRK is enabled without waiting for the DTRK PWM signal
0h = DISABLE
1h = ENABLE
2FORCE_BIASPINR/W0hEnables the priroty to supply VCC2 from BIAS by lowering the threshold.
0h = DISABLE
1h = ENABLE
1EN_BB_2P_FPWMR/W0hEnables 2phase BB swiching in fPWM mode
0h = DISABLE
1h = ENABLE
0EN_BB_2P_PSMR/W1hEnables 2phase BB swiching in PSM mode
0h = DISABLE
1h = ENABLE

9.10 MFR_SPECIFIC_D2 Register (Offset = D2h) [Reset = 7Ah]

MFR_SPECIFIC_D2 is shown in Table 9-12.

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Table 9-12 MFR_SPECIFIC_D2 Register Field Descriptions
BitFieldTypeResetDescription
7NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
6EN_ACTIVE_DVSR/W1hEnables the active down ramp for DVS using the discharge
0h = DISABLE
1h = ENABLE
5-4DVS_SLEW_RAMPR/W3hSets the positive and negative Vo slew rate for DVS
0h = 40mV/us
1h = 20mV/us
2h = 1mV/us
3h = 0.5mV/us
3-2DISCHARGE_STRENGTHR/W2hSets the discharge current for the Vo discharge
0h = SLOW (25mA)
1h = MEDIUM (50mA)
2h = FAST (75mA)
3h = FAST (75mA)
1DISCHARGE_CONFIG0R/W1hSelects the discharge together with CONV_EN
0h = DISABLE
1h = ENABLE
0DISCHARGE_CONFIG1R/W0hSelects the discharge until the VTH DISCH
0h = DISABLE
1h = ENABLE

9.11 MFR_SPECIFIC_D5 Register (Offset = D5h) [Reset = 3Fh]

MFR_SPECIFIC_D5 is shown in Table 9-13.

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Table 9-13 MFR_SPECIFIC_D5 Register Field Descriptions
BitFieldTypeResetDescription
7-6NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
5-0V_OVP2R/W3FhOVP2 threshold voltage
0h = 4.00V
1h = 4.500V
2h = 5.000V
3h = 5.500V
4h = 6.000V
5h = 6.500V
6h = 7.000V
7h = 7.500V
8h = 8.000V
9h = 8.500V
Ah = 9.000V
Bh = 9.500V
Ch = 10.000V
Dh = 10.500V
Eh = 11.000V
Fh = 11.500V
10h = 12.000V
11h = 12.500V
12h = 13.000V
13h = 13.500V
14h = 14.000V
15h = 14.500V
16h = 15.000V
17h = 15.500V
18h = 16.000V
19h = 17.000V
1Ah = 18.000V
1Bh = 19.000V
1Ch = 20.000V
1Dh = 21.000V
1Eh = 22.000V
1Fh = 23.000V
20h = 24.000V
21h = 25.000V
22h = 26.000V
23h = 27.000V
24h = 28.000V
25h = 29.000V
26h = 30.000V
27h = 31.000V
28h = 32.000V
29h = 33.000V
2Ah = 34.000V
2Bh = 35.000V
2Ch = 36.000V
2Dh = 37.000V
2Eh = 38.000V
2Fh = 39.000V
30h = 40.000V
31h = 41.000V
32h = 42.000V
33h = 43.000V
34h = 44.000V
35h = 45.000V
36h = 46.000V
37h = 47.000V
38h = 48.000V
39h = 49.000V
3Ah = 50.000V
3Bh = 51.000V
3Ch = 52.000V
3Dh = 53.000V
3Eh = 54.000V
3Fh = 55.000V

9.12 MFR_SPECIFIC_D6 Register (Offset = D6h) [Reset = 15h]

MFR_SPECIFIC_D6 is shown in Table 9-14.

Return to the Summary Table.

PS_Config0 Power stage Configuration

Table 9-14 MFR_SPECIFIC_D6 Register Field Descriptions
BitFieldTypeResetDescription
7-6CONFIG_SYNC_PINR/W0hSelects the SYNC function to mainain paralell operation
0h = Input sync on rising edge
1h = Input sync on falling edge
2h = Sync output from internal rising edge
3h = Sync output from internal falling edge (180deg phase)
5EN_CONST_TDEADR/W0hForces a constant deadtime for the setting of SEL_MIN_DEADTIME_GDRV. Disables frequnecy dependency of min Tdead
0h = DISABLE
1h = ENABLE
4SEL_SCALE_DTR/W1hScales the gate driver dead time freq dependence and 2 MHz setpoint
0h = DISABLE
1h = ENABLE
3-2SEL_MIN_DEADTIME_GDRVR/W1hDefines the minimum dead time at fsw = 2Mhz for the gate driver
0h = 10 ns (No delay)
1h = 20 ns
2h = 40 ns
3h = 60 ns
1-0BB_MIN_TIME_OFFSETR/W1hScales the BB min Ton or Toff time for the gate refresh
0h = 0.75 x
1h = 1 x
2h = 1.25 x
3h = 1.5 x

9.13 MFR_SPECIFIC_D7 Register (Offset = D7h) [Reset = 28h]

MFR_SPECIFIC_D7 is shown in Table 9-15.

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Table 9-15 MFR_SPECIFIC_D7 Register Field Descriptions
BitFieldTypeResetDescription
7-6NILR0hThis bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
5-4SEL_INDUC_DERATER/W2hSelect the inductor de-rating for PSM mode to slope
0h = DISABLE
1h = 20%
2h = 30%
3h = 40%
3-0SEL_SLOPE_COMPR/W8hSelect slope comp current, as ratio of RT current
0h = 0.125
1h = 0.25
2h = 0.375
3h = 0.5
4h = 0.625
5h = 0.75
6h = 0.875
7h = 1
8h = 1.5
9h = 2
Ah = 2.5
Bh = 3
Ch = 3.5
Dh = 4
Eh = 4.5
Fh = 5

9.14 MFR_SPECIFIC_D8 Register (Offset = D8h) [Reset = 84h]

MFR_SPECIFIC_D8 is shown in Table 9-16.

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Table 9-16 MFR_SPECIFIC_D8 Register Field Descriptions
BitFieldTypeResetDescription
7SEL_FB_DIV20R/W1hSelect internal FB divider ratio of 20
0h = DIV10
1h = DIV20
6EN_CDCR/W0hEnables the cable drop compensation
0h = DISABLE
1h = ENABLE
5-4CDC_GAINR/W0hSelectes the Gain for the CDC voltage (1V) with respect to Vout
0h = 0.250V
1h = 0.500V
2h = 1.000V
3h = 2.000V
3-2SEL_DRV1_SEQR/W1hSelect the sequencing for the DRV 1 operation
0h = Pull-Low/ CP running if converter operation is off
1h = Pull-Low/ CP running if converter operation is on
2h = FORCE ACTIVE
3h = FORCE OFF
1-0SEL_DRV1_SUPR/W0hSelect the driver configuration for DRV1 pin
0h = Open Drain (active = pull low)
1h = Vout
2h = VBIAS
3h = VCC2 (Charge Pump driver)

9.15 IVP_VOLTAGE Register (Offset = DAh) [Reset = FFh]

IVP_VOLTAGE is shown in Table 9-17.

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Table 9-17 IVP_VOLTAGE Register Field Descriptions
BitFieldTypeResetDescription
7-0V_IVPR/WFFhInput Overvoltage Protection and Regulatoin Threshold
0h = 4.75V
1h = 4.875V
2h = 5.000V
3h = 5.125V
4h = 5.250V
5h = 5.375V
6h = 5.500V
7h = 5.625V
8h = 5.750V
9h = 5.875V
Ah = 6.000V
Bh = 6.125V
Ch = 6.250V
Dh = 6.375V
Eh = 6.500V
Fh = 6.625V
10h = 6.750V
11h = 6.875V
12h = 7.000V
13h = 7.125V
14h = 7.250V
15h = 7.375V
16h = 7.500V
17h = 7.625V
18h = 7.750V
19h = 7.875V
1Ah = 8.000V
1Bh = 8.125V
1Ch = 8.250V
1Dh = 8.375V
1Eh = 8.500V
1Fh = 8.625V
20h = 8.750V
21h = 8.875V
22h = 9.000V
23h = 9.125V
24h = 9.250V
25h = 9.375V
26h = 9.500V
27h = 9.625V
28h = 9.750V
29h = 9.875V
2Ah = 10.000V
2Bh = 10.125V
2Ch = 10.250V
2Dh = 10.375V
2Eh = 10.500V
2Fh = 10.625V
30h = 10.750V
31h = 10.875V
32h = 11.000V
33h = 11.125V
34h = 11.250V
35h = 11.375V
36h = 11.500V
37h = 11.625V
38h = 11.750V
39h = 11.875V
3Ah = 12.000V
3Bh = 12.125V
3Ch = 12.250V
3Dh = 12.375V
3Eh = 12.500V
3Fh = 12.625V
40h = 12.750V
41h = 12.875V
42h = 13.000V
43h = 13.125V
44h = 13.250V
45h = 13.375V
46h = 13.500V
47h = 13.625V
48h = 13.750V
49h = 13.875V
4Ah = 14.000V
4Bh = 14.125V
4Ch = 14.250V
4Dh = 14.375V
4Eh = 14.500V
4Fh = 14.625V
50h = 14.750V
51h = 14.875V
52h = 15.000V
53h = 15.125V
54h = 15.250V
55h = 15.375V
56h = 15.500V
57h = 15.625V
58h = 15.750V
59h = 15.875V
5Ah = 16.000V
5Bh = 16.125V
5Ch = 16.250V
5Dh = 16.375V
5Eh = 16.500V
5Fh = 16.625V
60h = 16.750V
61h = 16.875V
62h = 17.000V
63h = 17.125V
64h = 17.250V
65h = 17.375V
66h = 17.500V
67h = 17.625V
68h = 17.750V
69h = 17.875V
6Ah = 18.000V
6Bh = 18.125V
6Ch = 18.250V
6Dh = 18.375V
6Eh = 18.500V
6Fh = 18.625V
70h = 18.750V
71h = 18.875V
72h = 19.000V
73h = 19.125V
74h = 19.250V
75h = 19.375V
76h = 19.500V
77h = 19.625V
78h = 19.750V
79h = 19.875V
7Ah = 20.000V
7Bh = 20.125V
7Ch = 20.250V
7Dh = 20.375V
7Eh = 20.500V
7Fh = 20.625V
80h = 20.750V
81h = 20.875V
82h = 21.000V
83h = 21.125V
84h = 21.250V
85h = 21.375V
86h = 21.500V
87h = 21.625V
88h = 21.750V
89h = 21.875V
8Ah = 22.000V
8Bh = 22.125V
8Ch = 22.250V
8Dh = 22.375V
8Eh = 22.500V
8Fh = 22.625V
90h = 22.750V
91h = 22.875V
92h = 23.000V
93h = 23.125V
94h = 23.250V
95h = 23.500V
96h = 23.750V
97h = 24.000V
98h = 24.250V
99h = 24.500V
9Ah = 24.750V
9Bh = 25.000V
9Ch = 25.250V
9Dh = 25.500V
9Eh = 25.750V
9Fh = 26.000V
A0h = 26.250V
A1h = 26.500V
A2h = 26.750V
A3h = 27.000V
A4h = 27.250V
A5h = 27.500V
A6h = 27.750V
A7h = 28.000V
A8h = 28.250V
A9h = 28.500V
AAh = 28.750V
ABh = 29.000V
ACh = 29.250V
ADh = 29.500V
AEh = 29.750V
AFh = 30.000V
B0h = 30.250V
B1h = 30.500V
B2h = 30.750V
B3h = 31.000V
B4h = 31.250V
B5h = 31.500V
B6h = 31.750V
B7h = 32.000V
B8h = 32.250V
B9h = 32.500V
BAh = 32.750V
BBh = 33.000V
BCh = 33.250V
BDh = 33.500V
BEh = 33.750V
BFh = 34.000V
C0h = 34.250V
C1h = 34.500V
C2h = 34.750V
C3h = 35.000V
C4h = 35.250V
C5h = 35.500V
C6h = 35.750V
C7h = 36.000V
C8h = 36.250V
C9h = 36.500V
CAh = 36.750V
CBh = 37.000V
CCh = 37.250V
CDh = 37.500V
CEh = 37.750V
CFh = 38.000V
D0h = 38.250V
D1h = 38.500V
D2h = 38.750V
D3h = 39.000V
D4h = 39.250V
D5h = 39.500V
D6h = 39.750V
D7h = 40.000V
D8h = 40.250V
D9h = 40.500V
DAh = 40.750V
DBh = 41.000V
DCh = 41.250V
DDh = 41.500V
DEh = 41.750V
DFh = 42.000V
E0h = 42.250V
E1h = 42.500V
E2h = 42.750V
E3h = 43.000V
E4h = 43.250V
E5h = 43.500V
E6h = 43.750V
E7h = 44.000V
E8h = 44.250V
E9h = 44.500V
EAh = 44.750V
EBh = 45.000V
ECh = 45.250V
EDh = 45.500V
EEh = 45.750V
EFh = 46.000V
F0h = 46.250V
F1h = 46.500V
F2h = 46.750V
F3h = 47.000V
F4h = 47.250V
F5h = 47.500V
F6h = 47.750V
F7h = 48.000V
F8h = 48.250V
F9h = 48.500V
FAh = 48.750V
FBh = 49.000V
FCh = 49.250V
FDh = 49.500V
FEh = 49.750V
FFh = 50.000V