SNVSCL0 November   2023 LM25185-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power MOSFET Gate Driver
      2. 7.3.2  PSR Flyback Modes of Operation
      3. 7.3.3  High Voltage VCC Regulator
      4. 7.3.4  Setting the Output Voltage
        1. 7.3.4.1 Diode Thermal Compensation
      5. 7.3.5  Control Loop Error Amplifier
      6. 7.3.6  Precision Enable
      7. 7.3.7  Configurable Soft Start
      8. 7.3.8  Minimum On-Time and Off-Time
      9. 7.3.9  Current Sensing and Overcurrent Protection
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Wide VIN, Low IQ PSR Flyback Converter Rated at 16.4 V, 1 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Custom Design With Excel Quickstart Tool
          3. 8.2.1.2.3  Flyback Transformer T1 and Current-Sense Resistor (RCS)
          4. 8.2.1.2.4  Flyback Diode – DFLY
          5. 8.2.1.2.5  Leakage Inductance Clamp Circuit – DF, DCLAMP
          6. 8.2.1.2.6  Feedback Resistor – RFB
          7. 8.2.1.2.7  Thermal Compensation Resistor – RTC
          8. 8.2.1.2.8  UVLO Resistors – RUV1, RUV2
          9. 8.2.1.2.9  Soft-Start Capacitor – CSS
          10. 8.2.1.2.10 Compensation Components
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

PSR Flyback Modes of Operation

The LM25185-Q1 uses a variable-frequency, peak current-mode (VFPCM) control architecture with three possible modes of operation as illustrated in Figure 7-2.

GUID-20230719-SS0I-M989-RMSK-7FV7DL162HRP-low.svg Figure 7-2 Three Modes of Operation Illustrated by Variation of Switching Frequency With Load

The LM25185-Q1 operates in boundary conduction mode (BCM) at heavy loads. The power MOSFET turns on when the current in the secondary winding reaches zero, and the MOSFET turns off when the peak primary current reaches the level dictated by the output of the internal error amplifier. As the load is decreased, the frequency increases to maintain BCM operation. Equation 1 gives the duty cycle of the flyback converter in BCM.

Equation 1. D=(VOUT+VD)×NPSVIN+(VOUT+VD)×NPS

where

  • VD is the forward voltage drop of the flyback diode as the current approaches zero

Equation 2 gives the output power in BCM, where the applicable switching frequency and peak primary current are specified by Equation 3 and Equation 4, respectively.

Equation 2. POUTBCM=LMAG×IPRI-PKBCM22×FSWBCM
Equation 3. FSWBCM=1IPRI-PK(BCM)×(LMAGVIN+LMAGNPS×(VOUT+VD))
Equation 4. IPRI-PK(BCM)=2×VOUT+VD×IOUTVIN×D

As the load decreases, the LM25185-Q1 clamps the maximum switching frequency to 350 kHz, and the converter enters discontinuous conduction mode (DCM). The power delivered to the output in DCM is proportional to the peak primary current squared as given by Equation 5 and Equation 6. Thus, as the load decreases, the peak current reduces to maintain regulation at 350-kHz switching frequency.

Equation 5. POUTDCM=LMAG×IPRI-PKDCM22×FSWDCM
Equation 6. IPRI-PKDCM=2×IOUT×(VOUT+VD)LMAG×FSWDCM
Equation 7. DDCM=LMAG×IPRI-PK(DCM)×FSWDCMVIN

At even lighter loads, the primary-side peak current set by the internal error amplifier decreases to a minimum level of 20 mV on VCS, or 20% of the 100-mV peak value, and the MOSFET gate off-time extends to maintain the output load requirement. The system operates in frequency foldback mode (FFM), and the switching frequency decreases as the load current is reduced. Other than a fault condition, the lowest frequency of operation of the LM25185-Q1 is 11 kHz, which sets a minimum load requirement of approximately 0.5% full load.