SNVSCL1 November   2023 LM25185

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power MOSFET Gate Driver
      2. 7.3.2  PSR Flyback Modes of Operation
      3. 7.3.3  High Voltage VCC Regulator
      4. 7.3.4  Setting the Output Voltage
        1. 7.3.4.1 Diode Thermal Compensation
      5. 7.3.5  Control Loop Error Amplifier
      6. 7.3.6  Precision Enable
      7. 7.3.7  Configurable Soft Start
      8. 7.3.8  Minimum On-Time and Off-Time
      9. 7.3.9  Current Sensing and Overcurrent Protection
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Wide VIN, Low IQ PSR Flyback Converter Rated at 16.4 V, 1 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Custom Design With Excel Quickstart Tool
          3. 8.2.1.2.3  Flyback Transformer T1 and Current-Sense Resistor (RCS)
          4. 8.2.1.2.4  Flyback Diode – DFLY
          5. 8.2.1.2.5  Leakage Inductance Clamp Circuit – DF, DCLAMP
          6. 8.2.1.2.6  Feedback Resistor – RFB
          7. 8.2.1.2.7  Thermal Compensation Resistor – RTC
          8. 8.2.1.2.8  UVLO Resistors – RUV1, RUV2
          9. 8.2.1.2.9  Soft-Start Capacitor – CSS
          10. 8.2.1.2.10 Compensation Components
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 Control Loop Error Amplifier

The inputs of the error amplifier include a level-shifted version of the FB voltage and an internal 1-V reference set by the resistor at RSET. The output of the error amplifier is connected to the COMP pin, allowing the use of a Type 2 loop compensation network to stabilize the converter. RCOMP, CCOMP, and optional CHF loop compensation components configure the error amplifier gain and phase characteristics to achieve a stable loop response. In BCM operation when the output voltage is in regulation, an on-time interval is initiated when the secondary current reaches zero. The power MOSFET is subsequently turned off when an amplified version of the peak primary current exceeds the error amplifier output.