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  • LM2623 General-Purpose, Gated-Oscillator-Based DC-DC Boost Converter

    • SNVS188I May   2004  – October 2017 LM2623

      PRODUCTION DATA.  

  • CONTENTS
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  • LM2623 General-Purpose, Gated-Oscillator-Based DC-DC Boost Converter
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration And Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gated Oscillator Control Scheme.
      2. 7.3.2 Cycle-To-Cycle Pfm
      3. 7.3.3 Shutdown
      4. 7.3.4 Internal Current Limit And Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Frequency Modulation (Pfm)
      2. 7.4.2 Low Voltage Start-Up
  8. 8 Applications And Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Non-Linear Effect
        2. 8.2.2.2 Choosing The Correct C3 Capacitor
        3. 8.2.2.3 Setting The Output Voltage
        4. 8.2.2.4 VDD Supply
        5. 8.2.2.5 Setting The Switching Frequency
        6. 8.2.2.6 Output Diode Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Boost Output Capacitor Placement
      2. 10.1.2 Schottky Diode Placement
      3. 10.1.3 Boost Input / VDD Capacitor Placement
    2. 10.2 Layout Example
    3. 10.3 WSON Package Devices
  11. 11Device And Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, And Orderable Information
  13. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • NHE|14
    • MPDS416
  • DGK|8
    • MPDS028E
Thermal pad, mechanical data (Package|Pins)
Orderable Information
  • snvs188i_oa
  • snvs188i_pm
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DATA SHEET

LM2623 General-Purpose, Gated-Oscillator-Based DC-DC Boost Converter

1 Features

  • Good Efficiency Over a Very Wide Load Range
  • Very Low Output Voltage Ripple
  • Up to 2-MHz Switching Frequency
  • 0.8-V to 14-V Operating Voltage
  • 1.1-V Start-up Voltage
  • 1.24-V to 14-V Adjustable Output Voltage
  • Up to 2-A Load Current at Low Output Voltages
  • 0.17-Ω Internal MOSFET
  • Up to 90% Regulator Efficiency
  • 80-µA Typical Operating Current (Into VDD Pin of Supply)
  • < 2.5-µA Ensured Supply Current In Shutdown
  • Small 8-Pin VSSOP Package (Half the Footprint of Standard 8-Pin SOIC Package); 1.09-mm Package Height
  • 4-mm × 4-mm Thermally Enhanced WSON Package Option

2 Applications

  • Cameras, Pagers and Cell Phones
  • PDAs, Palmtop Computers, GPS devices
  • White LED Drive, TFT, or Scanned LCDs
  • Flash Memory Programming
  • Hand-Held Instruments
  • 1, 2, 3, or 4 Cell Alkaline Systems
  • 1, 2, or 3 Cell Lithium-ion Systems

3 Description

The LM2623 is a high-efficiency, general-purpose, step-up DC-DC switching regulator for battery-powered and low input voltage systems. It accepts an input voltage between 0.8 V and 14 V and converts it into a regulated output voltage between 1.24 V and 14 V. Efficiencies up to 90% are achievable with the LM2623.

In order to adapt to a number of applications, the LM2623 allows the designer to vary the output voltage, the operating frequency (300 kHz to 2 MHz) and duty cycle (17% to 90%) to optimize the part's performance. The selected values can be fixed or can vary with battery voltage or input to output voltage ratio. The LM2623 uses a very simple, on/off regulation mode to produce good efficiency and stable operation over a wide operating range. It normally regulates by skipping switching cycles when it reaches the regulation limit (Pulse Frequency Modulation).

Note: See Non-Linear Effect and Choosing The Correct C3 Capacitor so that any challenges with designing with this part can be taken into account before a board design/layout is finalized.

For alternative solutions, See Also: LM2700, LM2622, LM2731, LM2733, and LM2621.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LM2623 WSON (14) 4.00 mm × 4.00 mm
VSSOP (8) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

LM2623 20038801.gif

4 Revision History

Changes from H Revision (November 2014) to I Revision

  • Changed Handling Ratings table to ESD Ratings to comply with current formatGo
  • Moved Storage temperature spec to Abs Max table Go
  • Added separate row for SW pin HBM ESD rating Go
  • Added condition to Recommended Operating Conditions table Go
  • Changed Updated RθJA value for NHE package from "40 – 56" to "46.5"°C/W and DGK package from "240" to 152.5" °C/W; added additional thermal informationGo

Changes from G Revision (December 2005) to H Revision

  • Added Device Information and Handling Rating tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections; moved some curves to Application Curves sectionGo

5 Pin Configuration And Functions

NHE Package
14-Pin WSON
Top View
LM2623 20038802.png
DGK Package
8-Pin VSSOP
Top View
LM2623 20038818.png

Pin Functions

PIN TYPE DESCRIPTION
WSON VSSOP NAME
1 — NC N/A No Connect
2, 3 1 PGND GND Power Ground (WSON Pins 2 and 3 must be shorted together).
4 2 EN Digital Active-Low Shutdown Input
5 3 FREQ Analog Frequency Adjust. An external resistor connected between this pin and a voltage source sets the switching frequency of the LM2623.
6 4 FB Analog Output Voltage Feedback
7 — NC N/A No Connect
8 — NC N/A No connect
9 5 SGND GND Signal Ground
10 6 VDD Power Power Supply for Internal Circuitry
11 7 BOOT Analog Bootstrap Supply for the Gate Drive of Internal MOSFET Power Switch
12, 13 8 SW Analog Drain of the Internal MOSFET Power Switch. (WSON pins 12 and 13 must be shorted together.)
14 — NC N/A No Connect
DAP — DAP Thermal To be soldered to board for enhanced thermal dissipation. To be electrically isolated/floating.

6 Specifications

6.1 Absolute Maximum Ratings(1)(2)

MIN MAX UNIT
SW pin voltage –0.5 14.5 V
BOOT, VDD, EN and FB pins –0.5 10 V
FREQ pin 100 µA
TJmax(3) 150 °C
Lead temp. (soldering, 5 sec) 260 °C
Power dissipation (TA=25°C)(3) 500 mW
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), RθJA (junction-to-ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax – TA) / RθJA or the number given in the Absolute Maximum Ratings, whichever is lower.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) All pins except SW pin ±2000 V
SW pin (VSSOP package pin 8) (WSON package pin 12 and pin 13) ±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) All pins ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VDD pin 3 5 V
FB, EN pins 0 VDD
BOOT pin 0 10 V
Ambient temperature (TA) −40 85 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.4 Thermal Information

THERMAL METRIC(1) LM2623 UNIT
NHE (WSON) DGK (VSSOP
14 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 46.5 152.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 37.7 53.9 °C/W
RθJB Junction-to-board thermal resistance 23.6 73.2 °C/W
ψJT Junction-to-top characterization parameter 0.4 5.5 °C/W
ψJB Junction-to-board characterization parameter 23.8 72.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 4.6 N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

Limits apply for TJ = 25°C and VDD = VOUT = 3.3 V, unless otherwise specified.
PARAMETER TEST CONDITION MIN TYP MAX UNIT
VDD_ST Start-up supply voltage 25°C ILOAD = 0 mA(1) 1.1 V
VIN_OP Minimum operating supply voltage (once started) ILOAD = 0 mA 0.65 0.8 V
VFB FB pin voltage 1.24 V
−40°C to 85°C 1.2028 1.2772
VOUT_MAX Maximum output voltage 14 V
η Efficiency VIN = 3.6 V; VOUT = 5 V;
ILOAD = 500 mA		 87%
VIN = 2.5 V; VOUT = 3.3 V;
ILOAD = 200 mA		 87%
D Switch duty cycle 17
IDD Operating quiescent current(2) FB Pin > 1.3 V; EN Pin at VDD 80 µA
FB Pin > 1.3 V; EN Pin at VDD, −40°C to 85°C 110
ISD Shutdown quiescent current(3) VDD, BOOT and SW Pins at 5 V;
EN Pin < 200 mV 		0.01 µA
VDD, BOOT and SW Pins at 5 V;
EN Pin < 200 mV, −40°C to 85°C		 2.5
ICL Switch peak current limit LM2623A 2.2 2. 85 A
IC Switch peak current limit LM2623 1.2
RDS_ON MOSFET switch on resistance 0.17 Ω
−40°C to 85°C 0.26
ENABLE SECTION
VEN_LO EN pin voltage low(4) −40°C to 85°C 0.15 VDD V
VEN_HI EN pin voltage high(4) −40°C to 85°C 0.7 VDD
(1) VDD tied to BOOT and EN pins. Frequency pin tied to VDD through 121-KΩ resistor. VDD_ST = VDD when start-up occurs. VIN is VDD + D1 voltage (usually 10 mV to 50 mV at start-up).
(2) This is the current into the VDD pin.
(3) This is the total current into pins VDD, BOOT, SW, and FREQ.
(4) When the EN pin is below VEN_LO, the regulator is shut down; when it is above VEN_HI, the regulator is operating.

6.6 Typical Characteristics

LM2623 20038829.gif
VOUT = 5 V
Figure 1. Efficiency vs Supply Voltage
LM2623 20038831.gif
Figure 2. VFB vs Temperature
LM2623 20038828.gif
Figure 3. Frequency vs VIN
LM2623 20038825.gif
Figure 5. Typical RDS(ON) vs Temperature
LM2623 20038844.png
VOUT = 5 V
Figure 7. Output Voltage vs Supply Voltage
LM2623 20038826.gif
Figure 4. Maximum Start-Up Voltage vs Temperature
LM2623 20038827.gif
Figure 6. Typical Current Limit vs Temperature

 
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