SNVSB35C May   2018  – November 2024 LM26420-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics Per Buck
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Soft Start
      2. 6.3.2 Power Good
      3. 6.3.3 Precision Enable
    4. 6.4 Device Functional Modes
      1. 6.4.1 Output Overvoltage Protection
      2. 6.4.2 Undervoltage Lockout
      3. 6.4.3 Current Limit
      4. 6.4.4 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Programming Output Voltage
      2. 7.1.2 VINC Filtering Components
      3. 7.1.3 Using Precision Enable and Power Good
      4. 7.1.4 Overcurrent Protection for HTSSOP-20 Package
      5. 7.1.5 Current Limit and Short-Circuit Protection for WQFN-16 Package
    2. 7.2 Typical Applications
      1. 7.2.1 2.2-MHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2 Inductor Selection
          3. 7.2.1.2.3 Input Capacitor Selection
          4. 7.2.1.2.4 Output Capacitor
          5. 7.2.1.2.5 Calculating Efficiency and Junction Temperature
        3. 7.2.1.3 Application Curves
      2. 7.2.2 2.2-MHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
      3. 7.2.3 LM26420-Q12.2-MHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Power Supply Recommendations - HTSSOP-20 Package
      2. 7.3.2 Power Supply Recommendations - WQFN-16 Package
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
        1. 7.4.3.1 Method 1: Silicon Junction Temperature Determination
        2. 7.4.3.2 Thermal Shutdown Temperature Determination
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.1 Layout Guidelines

When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration is the close coupling of the GND connections of the input capacitor and the PGND pin. These ground ends must be close to one another and be connected to the GND plane with at least two through-holes. Place these components as close to the device as possible. Next in importance is the location of the GND connection of the output capacitor, which must be near the GND connections of VIND and PGND. There must be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island. The FB pin is a high impedance node, and care must be taken to make the FB trace short to avoid noise pickup and inaccurate regulation. The feedback resistors must be placed as close to the device as possible, with the GND of R1 placed as close to the GND of the device as possible. The VOUT trace to R2 must be routed away from the inductor and any other traces that are switching. High AC currents flow through the VIN, SW, and VOUT traces, so the high AC must be as short and wide as possible. However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor. The remaining components must also be placed as close as possible to the device. See AN-1229 SIMPLE SWITCHER® PCB Layout Guidelines application note for further considerations, and the LM26420-Q1 demo board as an example of a four-layer layout.

LM26420-Q1 Internal ConnectionFigure 7-16 Internal Connection

For certain high power applications, the PCB land can be modified to a dog bone shape (see Figure 7-17). By increasing the size of ground plane, and adding thermal vias, the RθJA for the application can be reduced.