SNVSB35C May   2018  – November 2024 LM26420-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics Per Buck
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Soft Start
      2. 6.3.2 Power Good
      3. 6.3.3 Precision Enable
    4. 6.4 Device Functional Modes
      1. 6.4.1 Output Overvoltage Protection
      2. 6.4.2 Undervoltage Lockout
      3. 6.4.3 Current Limit
      4. 6.4.4 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Programming Output Voltage
      2. 7.1.2 VINC Filtering Components
      3. 7.1.3 Using Precision Enable and Power Good
      4. 7.1.4 Overcurrent Protection for HTSSOP-20 Package
      5. 7.1.5 Current Limit and Short-Circuit Protection for WQFN-16 Package
    2. 7.2 Typical Applications
      1. 7.2.1 2.2-MHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2 Inductor Selection
          3. 7.2.1.2.3 Input Capacitor Selection
          4. 7.2.1.2.4 Output Capacitor
          5. 7.2.1.2.5 Calculating Efficiency and Junction Temperature
        3. 7.2.1.3 Application Curves
      2. 7.2.2 2.2-MHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
      3. 7.2.3 LM26420-Q12.2-MHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Power Supply Recommendations - HTSSOP-20 Package
      2. 7.3.2 Power Supply Recommendations - WQFN-16 Package
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
        1. 7.4.3.1 Method 1: Silicon Junction Temperature Determination
        2. 7.4.3.2 Thermal Shutdown Temperature Determination
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7.2.1.2.5 Calculating Efficiency and Junction Temperature

The complete LM26420-Q1 DC/DC converter efficiency can be estimated in the following manner.

Equation 19. LM26420-Q1

or

Equation 20. LM26420-Q1

The following equations show the calculations for determining the most significant power losses. Other losses totaling less than 2% are not discussed.

Power loss (PLOSS) is the sum of two basic types of losses in the converter: switching and conduction. Conduction losses usually dominate at higher output loads, whereas switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D):

Equation 21. LM26420-Q1

VSW_TOP is the voltage drop across the internal PFET when on, and is equal to:

Equation 22. VSW_TOP = IOUT × RDSON_TOP

VSW_BOT is the voltage drop across the internal NFET when on, and is equal to:

Equation 23. VSW_BOT = IOUT × RDSON_BOT

If the voltage drop across the inductor (VDCR) is accounted for, the equation becomes: 

Equation 24. LM26420-Q1

Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to:

Equation 25. PIND = IOUT2 × RDCR

The LM26420-Q1 conduction loss is mainly associated with the two internal FETs:

Equation 26. LM26420-Q1

If the inductor ripple current is fairly small, the conduction losses can be simplified to:

Equation 27. PCOND_TOP = (IOUT2 × RDSON_TOP × D)
Equation 28. PCOND_BOT = (IOUT2 × RDSON_BOT × (1-D))
Equation 29. PCOND = PCOND_TOP + PCOND_BOT

Switching losses are also associated with the internal FETs. Switching losses occur during the switch on and off transition periods, where voltages and currents overlap, resulting in power loss. The simplest means to determine this loss is empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node.

Switching Power Loss is calculated as follows:

Equation 30. PSWR = 1/2(VIN × IOUT × FSW × TRISE)
Equation 31. PSWF = 1/2(VIN × IOUT × FSW × TFALL)
Equation 32. PSW = PSWR + PSWF

Another loss is the power required for operation of the internal circuitry:

Equation 33. PQ = IQ × VIN

IQ is the quiescent operating current, and is typically around 8.4 mA (IQVINC = 4.7 mA + IQVIND = 3.7 mA) for the 2.2-MHz frequency option.

Due to Dead-Time-Control Logic in the converter, there is a small delay (approximately 4 ns) between the turn ON and OFF of the TOP and BOTTOM FET. During this time, the body diode of the BOTTOM FET is conducting with a voltage drop of VBDIODE (approximately 0.65 V). This allows the inductor current to circulate to the output, until the BOTTOM FET is turned ON and the inductor current passes through the FET. There is a small amount of power loss due to this body diode conducting and can be calculated as follows:

Equation 34. PBDIODE = 2 × (VBDIODE × IOUT × FSW × TBDIODE)

Typical Application power losses are:

Equation 35. PLOSS = ΣPCOND + PSW + PBDIODE + PIND + PQ
Equation 36. PINTERNAL = ΣPCOND + PSW+ PBDIODE + PQ
Table 7-3 Power Loss Tabulation
DESIGN PARAMETER VALUE DESIGN PARAMETER VALUE
VIN 5 V VOUT 1.2 V
IOUT 2 A POUT 2.4 W
FSW 2.2 MHz
VBDIODE 0.65 V PBDIODE 5.7 mW
IQ 8.4 mA PQ 42 mW
TRISE 1.5 ns PSWR 4.1 mW
TFALL 1.5 ns PSWF 4.1 mW
RDSON_TOP 75 mΩ PCOND_TOP 81 mW
RDSON_BOT 55 mΩ PCOND_BOT 167 mW
INDDCR 20 mΩ PIND 80 mW
D 0.262 PLOSS 384 mW
η 86.2% PINTERNAL 304 mW

These calculations assume a junction temperature of 25°C. The RDSON values are larger due to internal heating; therefore, the internal power loss (PINTERNAL) must be first calculated to estimate the rise in junction temperature.