SNVS136L September 1998 – June 2016 LM2672
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOIC, PDIP | WSON | ||
CB | 1 | 1 | I | Boot-strap capacitor connection for high-side driver. Connect a high quality 100-nF capacitor from CB to VSW Pin. |
FB | 4 | 8 | I | Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT for ADJ version or connect this pin directly to the output capacitor for a fixed output version. |
GND | 6 | 11, 12 | — | Power ground pins. Connect to system ground. Ground pins of CIN and COUT. Path to CIN must be as short as possible. |
NC | — | 2, 3, 5, 7, 10, 13 |
— | No connection pins. |
ON/OFF | 5 | 9 | I | Enable input to the voltage regulator. High = ON and low = OFF. Pull this pin high or float to enable the regulator. |
SS | 2 | 4 | I | Soft-start capacitor pin. Connect a capacitor from this pin to GND to control the output voltage ramp. If the feature not desired, the pin can be left floating. |
SYNC | 3 | 6 | I | This input allows control of the switching clock frequency. If left open-circuited the regulator is switched at the internal oscillator frequency, typically 260 kHz. |
VIN | 7 | 14 | I | Supply input pin to collector pin of high side FET. Connect to power supply and input bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and GND must be as short as possible. |
VSW | 8 | 15, 16 | O | Source pin of the internal High Side FET. This is a switching node. Attached this pin to an inductor and the cathode of the external diode. |