SNVS276I April   2004  – February 2019 LM2743

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Start Up and Soft-Start
      2. 7.3.2  Normal Operation
      3. 7.3.3  Tracking a Voltage Level
      4. 7.3.4  Tracking Voltage Slew Rate
      5. 7.3.5  Sequencing
      6. 7.3.6  SD Pin Impedance
      7. 7.3.7  MOSFET Gate Drivers
      8. 7.3.8  Power Good Signal
      9. 7.3.9  UVLO
      10. 7.3.10 Current Limit
      11. 7.3.11 Foldback Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Synchronous Buck Converter Typical Application using LM2743
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Duty Cycle Calculation
          3. 8.2.1.2.3 Input Capacitor
          4. 8.2.1.2.4 Output Inductor
          5. 8.2.1.2.5 Output Capacitor
          6. 8.2.1.2.6 MOSFETs
          7. 8.2.1.2.7 Support Components
          8. 8.2.1.2.8 Control Loop Compensation
          9. 8.2.1.2.9 Efficiency Calculations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Example Circuit 1
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Bill of Materials
      3. 8.2.3 Example Circuit 2
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Bill of Materials
      4. 8.2.4 Example Circuit 3
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Bill of Materials
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.2.9 Efficiency Calculations

The following is a sample calculation.

A reasonable estimation of the efficiency of a switching buck controller can be obtained by adding together the Output Power (POUT) loss and the Total Power (PTOTAL) loss:

Equation 47. LM2743 20095226.gif

The Output Power (POUT) for the Figure 30 design is (1.2 V x 4 A) = 4.8 W. The Total Power (PTOTAL), with an efficiency calculation to complement the design, is shown below.

The majority of the power losses are due to low and high side of MOSFET’s losses. The losses in any MOSFET are group of switching (PSW) and conduction losses(PCND).

Equation 48. PFET = PSW + PCND = 61.38 mW + 270.42 mW
Equation 49. PFET = 331.8 mW

 

The following equations show FET Switching Loss (PSW).

Equation 50. PSW = PSW(ON) + PSW(OFF)
Equation 51. PSW = 0.5 x VIN x IOUT x (tr + tf) x fSW
Equation 52. PSW = 0.5 x 3.3 V x 4 A x 300 kHz x 31 ns
Equation 53. PSW = 61.38 mW

 

The FDS6898A has a typical turn-on rise time tr and turn-off fall time tf of 15 ns and 16 ns, respectively. The switching losses for this type of dual N-Channel MOSFETs are 0.061 W.

The following equations show FET Conduction Loss (PCND).

Equation 54. PCND = PCND1 + PCND2
Equation 55. PCND1 = (IOUT)2 x RDS(ON) x k x D
Equation 56. PCND2 = (IOUT)2 x RDS(ON) x k x (1-D)

 

RDS(ON) = 13 mΩ and the factor is a constant value (k = 1.3) to account for the increasing RDS(ON) of a FET due to heating.

Equation 57. PCND1 = (4A)2 x 13 mΩ x 1.3 x 0.364
Equation 58. PCND2 = (4A)2 x 13 mΩ x 1.3 x (1 - 0.364)
Equation 59. PCND = 98.42 mW + 172 mW = 270.42 mW

 

There are few additional losses that are taken into account:

The following equations show IC Operating Loss (PIC).

Equation 60. PIC = IQ_VCC x VCC,

where IQ-VCC is the typical operating VCC current

Equation 61. PIC= 1.5 mA x 3.3V = 4.95 mW

 

The following equations show FET Gate Charging Loss (PGATE).

Equation 62. PGATE = n x VCC x QGS x fSW
Equation 63. PGATE = 2 x 3.3 V x 3 nC x 300 kHz
Equation 64. PGATE = 5.94 mW

 

The value n is the total number of FETs used and QGS is the typical gate-source charge value, which is 3 nC. For the FDS6898A the gate charging loss is 5.94 mW.

The following equations show Input Capacitor Loss (PCAP).

Equation 65. LM2743 20095222.gif where
Equation 66. LM2743 20095221.gif

Here n is the number of paralleled capacitors, ESR is the equivalent series resistance of each, and PCAP is the dissipation in each. So for example if we use only one input capacitor of 24 mΩ.

Equation 67. LM2743 20095229.gif
Equation 68. PCAP = 88.8 mW

 

The following equation shows Output Inductor Loss (PIND).

Equation 69. PIND = I2OUT x DCR

 

where DCR is the DC resistance. Therefore, for example

Equation 70. PIND = (4A)2 x 11 mΩ
Equation 71. PIND = 176 mW

 

The following equations show Total System Efficiency.

Equation 72. PTOTAL = PFET + PIC + PGATE + PCAP + PIND
Equation 73. LM2743 20095226.gif
Equation 74. LM2743 20095231.gif